Mercurial > pt1
annotate driver/pt1_tuner_data.c @ 120:3914cc1b2375
- adapted to 3.x kernels
- replaced lock/unlock_kernel with mutex
- enlarged read size
- changed the order in clean up so that the module no longer hangs on being removed
- changed channel step of bs17 as the upstream
- adopted some useful patches
| author | Yoshiki Yazawa <yaz@honeyplanet.jp> |
|---|---|
| date | Fri, 06 Jan 2012 17:32:36 +0900 |
| parents | 6e661e828b43 |
| children | 2dc994610477 |
| rev | line source |
|---|---|
| 0 | 1 |
| 2 #include <linux/module.h> | |
| 3 #include <linux/kernel.h> | |
| 4 #include <linux/errno.h> | |
| 5 #include <linux/pci.h> | |
| 6 #include <linux/init.h> | |
| 7 #include <linux/interrupt.h> | |
| 8 | |
| 9 #include <asm/system.h> | |
| 10 #include <asm/io.h> | |
| 11 #include <asm/irq.h> | |
| 12 #include <asm/uaccess.h> | |
| 13 | |
| 14 #include "pt1_com.h" | |
| 15 #include "pt1_pci.h" | |
| 16 #include "pt1_i2c.h" | |
| 17 #include "pt1_tuner.h" | |
| 18 #include "pt1_tuner_data.h" | |
| 19 | |
| 20 /***************************************************************************/ | |
| 21 /* 省電力テーブル */ | |
| 22 /***************************************************************************/ | |
| 23 /* | |
|
102
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
24 ISDB-S省電力 |
|
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
25 送信:7Bit Address Mode(1b):17:01 |
|
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
26 |
|
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
27 ISDB-S省電力OFF |
|
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
28 送信:7Bit Address Mode(1b):fe:c0:e4:fe:c0:f4:d6 |
|
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
29 送信:7Bit Address Mode(1b):17:00 |
| 0 | 30 */ |
|
102
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
31 WBLOCK isdb_s_sleep = { |
|
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
32 0, |
|
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
33 2, |
|
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
34 {0x17, 0x01} |
|
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
35 }; |
| 0 | 36 WBLOCK isdb_s_wake = { |
| 37 0, | |
|
102
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
38 7, |
|
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
39 {0xFE, 0xC0, 0xE4, 0xFE, 0xC0, 0xF4, 0xD6} |
| 0 | 40 }; |
|
102
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
41 WBLOCK isdb_s_wake2 = { |
| 0 | 42 0, |
| 43 2, | |
| 44 {0x17, 0x00} | |
| 45 }; | |
|
102
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
46 |
| 0 | 47 /* |
|
102
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
48 ISDB-T省電力 |
|
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
49 送信:7Bit Address Mode(1a):03:90 |
| 0 | 50 |
|
102
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
51 ISDB-T省電力OFF |
|
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
52 送信:7Bit Address Mode(1a):fe:c2:0e:7f:c1:84:80 |
|
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
53 送信:7Bit Address Mode(1a):03:80 |
| 0 | 54 */ |
|
102
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
55 WBLOCK isdb_t_sleep = { |
|
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
56 0, |
|
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
57 2, |
|
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
58 {0x03, 0x90} |
|
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
59 }; |
| 0 | 60 WBLOCK isdb_t_wake = { |
| 61 0, | |
|
102
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
62 7, |
|
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
63 {0xFE, 0xC2, 0x0E, 0x7F, 0xC1, 0x84, 0x80} |
| 0 | 64 }; |
|
102
6e661e828b43
send tuners to sleep mode when they are inactive
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
79
diff
changeset
|
65 WBLOCK isdb_t_wake2 = { |
| 0 | 66 0, |
| 67 2, | |
| 68 {0x03, 0x80} | |
| 69 }; | |
| 70 | |
| 71 /***************************************************************************/ | |
| 72 /* 初期化データ定義(共通) */ | |
| 73 /***************************************************************************/ | |
| 74 WBLOCK com_initdata = { | |
| 75 0, | |
| 76 2, | |
| 77 {0x01, 0x80} | |
| 78 }; | |
| 79 | |
| 80 /***************************************************************************/ | |
| 81 /* 初期化データ定義(ISDB-S) */ | |
| 82 /***************************************************************************/ | |
| 83 // ISDB-S初期化値1 | |
| 84 WBLOCK isdb_s_init1 ={ | |
| 85 0, | |
| 86 1, | |
| 79 | 87 {0x0f} |
| 0 | 88 }; |
| 89 // ISDB-S初期化値2 | |
| 90 WBLOCK isdb_s_init2 ={ | |
| 91 0, | |
| 92 2, | |
| 93 {0x04, 0x02} | |
| 94 }; | |
| 95 // ISDB-S初期化値3 | |
| 96 WBLOCK isdb_s_init3 ={ | |
| 97 0, | |
| 98 2, | |
|
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
99 {0x0D, 0x55} //pt1 only |
| 0 | 100 }; |
| 101 // ISDB-S初期化値4 | |
| 102 WBLOCK isdb_s_init4 ={ | |
| 103 0, | |
| 104 2, | |
| 105 {0x11, 0x40} | |
| 106 }; | |
| 107 // ISDB-S初期化値5 | |
| 108 WBLOCK isdb_s_init5 ={ | |
| 109 0, | |
| 110 2, | |
| 111 {0x13, 0x80} | |
| 112 }; | |
| 113 // ISDB-S初期化値6 | |
| 114 WBLOCK isdb_s_init6 ={ | |
| 115 0, | |
| 116 2, | |
| 117 {0x17, 0x01} | |
| 118 }; | |
| 119 // ISDB-S初期化値7 | |
| 120 WBLOCK isdb_s_init7 ={ | |
| 121 0, | |
| 122 2, | |
| 123 {0x1C, 0x0A} | |
| 124 }; | |
| 125 // ISDB-S初期化値8 | |
| 126 WBLOCK isdb_s_init8 ={ | |
| 127 0, | |
| 128 2, | |
| 129 {0x1D, 0xAA} | |
| 130 }; | |
| 131 // ISDB-S初期化値9 | |
| 132 WBLOCK isdb_s_init9 ={ | |
| 133 0, | |
| 134 2, | |
| 135 {0x1E, 0x20} | |
| 136 }; | |
| 137 // ISDB-S初期化値10 | |
| 138 WBLOCK isdb_s_init10 ={ | |
| 139 0, | |
| 140 2, | |
| 141 {0x1F, 0x88} | |
| 142 }; | |
| 143 // ISDB-S初期化値11 | |
| 144 WBLOCK isdb_s_init11 ={ | |
| 145 0, | |
| 146 2, | |
| 147 {0x51, 0xB0} | |
| 148 }; | |
| 149 // ISDB-S初期化値12 | |
| 150 WBLOCK isdb_s_init12 ={ | |
| 151 0, | |
| 152 2, | |
| 153 {0x52, 0x89} | |
| 154 }; | |
| 155 // ISDB-S初期化値13 | |
| 156 WBLOCK isdb_s_init13 ={ | |
| 157 0, | |
| 158 2, | |
| 159 {0x53, 0xB3} | |
| 160 }; | |
| 161 // ISDB-S初期化値14 | |
| 162 WBLOCK isdb_s_init14 ={ | |
| 163 0, | |
| 164 2, | |
| 165 {0x5A, 0x2D} | |
| 166 }; | |
| 167 // ISDB-S初期化値15 | |
| 168 WBLOCK isdb_s_init15 ={ | |
| 169 0, | |
| 170 2, | |
| 171 {0x5B, 0xD3} | |
| 172 }; | |
| 173 // ISDB-S初期化値16 | |
| 174 WBLOCK isdb_s_init16 ={ | |
| 175 0, | |
| 176 2, | |
| 177 {0x85, 0x69} | |
| 178 }; | |
| 179 // ISDB-S初期化値17 | |
| 180 WBLOCK isdb_s_init17 ={ | |
| 181 0, | |
| 182 2, | |
| 183 {0x87, 0x04} | |
| 184 }; | |
| 185 // ISDB-S初期化値18 | |
| 186 WBLOCK isdb_s_init18 ={ | |
| 187 0, | |
| 188 2, | |
|
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
189 {0x8E, 0x26} |
| 0 | 190 }; |
| 191 // ISDB-S初期化値19 | |
| 192 WBLOCK isdb_s_init19 ={ | |
| 193 0, | |
| 194 2, | |
| 195 {0xA3, 0xF7} | |
| 196 }; | |
| 197 // ISDB-S初期化値20 | |
| 198 WBLOCK isdb_s_init20 ={ | |
| 199 0, | |
| 200 2, | |
| 201 {0xA5, 0xC0} | |
| 202 }; | |
| 203 // ISDB-S初期化値21 | |
|
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
204 WBLOCK isdb_s_init21 ={ |
| 0 | 205 0, |
| 206 4, | |
| 207 {0xFE, 0xC0, 0xF0, 0x04} | |
| 208 }; | |
| 209 /***************************************************************************/ | |
| 210 /* 初期化データ定義(ISDB-T) */ | |
| 211 /***************************************************************************/ | |
| 212 // ISDB-T初期化値1 | |
| 213 WBLOCK isdb_t_init1 ={ | |
| 214 0, | |
| 215 2, | |
| 216 {0x03, 0x90} | |
| 217 }; | |
| 218 // ISDB-T初期化値2 | |
| 219 WBLOCK isdb_t_init2 ={ | |
| 220 0, | |
| 221 2, | |
|
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
222 {0x14, 0x8F} //pt1 only |
| 0 | 223 }; |
| 224 // ISDB-T初期化値3 | |
| 225 WBLOCK isdb_t_init3 ={ | |
| 226 0, | |
| 227 2, | |
| 228 {0x1C, 0x2A} | |
| 229 }; | |
| 230 // ISDB-T初期化値4 | |
| 231 WBLOCK isdb_t_init4 ={ | |
| 232 0, | |
| 233 2, | |
| 234 {0x1D, 0xA8} | |
| 235 }; | |
| 236 // ISDB-T初期化値5 | |
| 237 WBLOCK isdb_t_init5 ={ | |
| 238 0, | |
| 239 2, | |
| 240 {0x1E, 0xA2} | |
| 241 }; | |
| 242 // ISDB-T初期化値6 | |
| 243 WBLOCK isdb_t_init6 ={ | |
| 244 0, | |
| 245 2, | |
| 246 {0x22, 0x83} | |
| 247 }; | |
| 248 // ISDB-T初期化値7 | |
| 249 WBLOCK isdb_t_init7 ={ | |
| 250 0, | |
| 251 2, | |
|
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
252 {0x31, 0x0D} //pt1 |
| 0 | 253 }; |
| 254 // ISDB-T初期化値8 | |
| 255 WBLOCK isdb_t_init8 ={ | |
| 256 0, | |
| 257 2, | |
|
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
258 {0x32, 0xE0} //pt1 |
| 0 | 259 }; |
| 260 // ISDB-T初期化値9 | |
| 261 WBLOCK isdb_t_init9 ={ | |
| 262 0, | |
| 263 2, | |
|
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
264 {0x39, 0xD3} //pt1 |
| 0 | 265 }; |
| 266 // ISDB-T初期化値10 | |
| 267 WBLOCK isdb_t_init10 ={ | |
| 268 0, | |
| 269 2, | |
| 270 {0x3A, 0x00} | |
| 271 }; | |
| 272 // ISDB-T初期化値11 | |
| 273 WBLOCK isdb_t_init11 ={ | |
| 274 0, | |
| 275 2, | |
| 276 {0x5C, 0x40} | |
| 277 }; | |
| 278 // ISDB-T初期化値12 | |
| 279 WBLOCK isdb_t_init12 ={ | |
| 280 0, | |
| 281 2, | |
| 282 {0x5F, 0x80} | |
| 283 }; | |
| 284 // ISDB-T初期化値13 | |
| 285 WBLOCK isdb_t_init13 ={ | |
| 286 0, | |
| 287 2, | |
|
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
288 {0x75, 0x0a} |
| 0 | 289 }; |
| 290 // ISDB-T初期化値14 | |
| 291 WBLOCK isdb_t_init14 ={ | |
| 292 0, | |
| 293 2, | |
|
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
294 {0x76, 0x4c} |
| 0 | 295 }; |
| 296 // ISDB-T初期化値15 | |
| 297 WBLOCK isdb_t_init15 ={ | |
| 298 0, | |
| 299 2, | |
| 300 {0x77, 0x03} | |
| 301 }; | |
| 302 // ISDB-T初期化値16 | |
| 303 WBLOCK isdb_t_init16 ={ | |
| 304 0, | |
| 305 2, | |
| 306 {0xEF, 0x01} | |
| 307 }; | |
| 308 // ISDB-T初期化値17 | |
|
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
309 WBLOCK isdb_t_init17 ={ |
| 0 | 310 0, |
| 311 7, | |
| 312 {0xFE, 0xC2, 0x01, 0x8F, 0xC1, 0x80, 0x80} | |
| 313 }; | |
| 314 /***************************************************************************/ | |
| 315 /* 初期化データブロック定義(ISDB-S) */ | |
| 316 /***************************************************************************/ | |
| 77 | 317 WBLOCK *isdb_s_initial_pt1[PT1_MAX_ISDB_S_INIT] = |
| 0 | 318 { |
| 319 &isdb_s_init2, &isdb_s_init3, &isdb_s_init4, &isdb_s_init5, | |
| 320 &isdb_s_init6, &isdb_s_init7, &isdb_s_init8, &isdb_s_init9, | |
| 321 &isdb_s_init10, &isdb_s_init11, &isdb_s_init12, &isdb_s_init13, | |
| 322 &isdb_s_init14, &isdb_s_init15, &isdb_s_init16, &isdb_s_init17, | |
| 323 &isdb_s_init18, &isdb_s_init19, &isdb_s_init20 | |
| 324 }; | |
| 77 | 325 WBLOCK *isdb_s_initial_pt2[PT2_MAX_ISDB_S_INIT] = |
|
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
326 { |
|
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
327 &isdb_s_init2, &isdb_s_init4, &isdb_s_init5, |
|
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
328 &isdb_s_init6, &isdb_s_init7, &isdb_s_init8, &isdb_s_init9, |
|
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
329 &isdb_s_init10, &isdb_s_init11, &isdb_s_init12, &isdb_s_init13, |
|
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
330 &isdb_s_init14, &isdb_s_init15, &isdb_s_init16, &isdb_s_init17, |
|
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
331 &isdb_s_init18, &isdb_s_init19, &isdb_s_init20 |
|
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
332 }; |
| 0 | 333 /***************************************************************************/ |
| 334 /* 初期化データブロック定義(ISDB-T) */ | |
| 335 /***************************************************************************/ | |
| 77 | 336 WBLOCK *isdb_t_initial_pt1[PT1_MAX_ISDB_T_INIT] = |
| 0 | 337 { |
| 338 &isdb_t_init1, &isdb_t_init2, &isdb_t_init3, &isdb_t_init4, | |
| 339 &isdb_t_init5, &isdb_t_init6, &isdb_t_init7, &isdb_t_init8, | |
| 340 &isdb_t_init9, &isdb_t_init10, &isdb_t_init11, &isdb_t_init12, | |
| 341 &isdb_t_init13, &isdb_t_init14, &isdb_t_init15, &isdb_t_init16 | |
| 342 }; | |
| 77 | 343 WBLOCK *isdb_t_initial_pt2[PT2_MAX_ISDB_T_INIT] = |
|
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
344 { |
|
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
345 &isdb_t_init1, &isdb_t_init3, &isdb_t_init4, |
|
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
346 &isdb_t_init5, &isdb_t_init6, |
|
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
347 &isdb_t_init10, &isdb_t_init11, &isdb_t_init12, |
|
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
348 &isdb_t_init13, &isdb_t_init14, &isdb_t_init15, &isdb_t_init16 |
|
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
349 }; |
| 0 | 350 /***************************************************************************/ |
| 351 /* 地上デジタル用データ */ | |
| 352 /***************************************************************************/ | |
| 353 /***************************************************************************/ | |
| 354 /* 周波数設定基本テーブル */ | |
| 355 /* 0〜1: 固定 */ | |
| 356 /* 2〜3: 計算結果 */ | |
| 357 /* 4〜5: 追加計算結果 */ | |
| 358 /***************************************************************************/ | |
| 359 | |
| 360 WBLOCK isdb_t_pll_base = { | |
| 361 0, | |
| 362 2, | |
| 363 {0xFE, 0xC2, 0, 0, 0, 0, 0, 0} | |
| 364 }; | |
| 365 /***************************************************************************/ | |
| 366 /* 地デジ周波数ロックチェック */ | |
| 367 /***************************************************************************/ | |
| 368 WBLOCK isdb_t_pll_lock = { | |
| 369 0, | |
| 370 2, | |
| 371 {0xFE, 0xC3} | |
| 372 }; | |
| 373 | |
| 374 WBLOCK isdb_t_check_tune = { | |
| 375 0, | |
| 376 2, | |
| 377 {0x01, 0x40} | |
| 378 }; | |
| 379 | |
| 380 WBLOCK isdb_t_tune_read = { | |
| 381 0, | |
| 382 1, | |
| 383 {0x80} | |
| 384 }; | |
| 385 WBLOCK isdb_t_tmcc_read_1 = { | |
| 386 0, | |
| 387 1, | |
| 388 {0xB2} | |
| 389 }; | |
| 390 WBLOCK isdb_t_tmcc_read_2 = { | |
| 391 0, | |
| 392 1, | |
| 393 {0xB6} | |
| 394 }; | |
| 395 /***************************************************************************/ | |
| 396 /* 地デジ周波数ロックチェック */ | |
| 397 /***************************************************************************/ | |
|
9
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
|
398 WBLOCK isdb_t_signal1 = { |
| 0 | 399 0, |
| 400 1, | |
| 401 {0x8C} | |
| 402 }; | |
|
9
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
|
403 WBLOCK isdb_t_signal2 = { |
| 0 | 404 0, |
| 405 1, | |
| 406 {0x8D} | |
| 407 }; | |
| 408 WBLOCK isdb_t_agc2 = { | |
| 409 0, | |
| 410 1, | |
| 411 {0x82} | |
| 412 }; | |
| 413 WBLOCK isdb_t_lockedt1 = { | |
| 414 0, | |
| 415 1, | |
| 416 {0x96} | |
| 417 }; | |
| 418 WBLOCK isdb_t_lockedt2 = { | |
| 419 0, | |
| 420 1, | |
| 421 {0xB0} | |
| 422 }; | |
| 423 WBLOCK isdb_t_get_clock = { | |
| 424 0, | |
| 425 1, | |
| 426 {0x86} | |
| 427 }; | |
| 428 WBLOCK isdb_t_get_carrir = { | |
| 429 0, | |
| 430 1, | |
| 431 {0x84} | |
| 432 }; | |
| 433 | |
| 434 /***************************************************************************/ | |
| 435 /* 地デジ用データ */ | |
| 436 /***************************************************************************/ | |
| 437 | |
| 438 /***************************************************************************/ | |
| 439 /* BS用データ */ | |
| 440 /***************************************************************************/ | |
| 441 /***************************************************************************/ | |
| 442 /* BS周波数ロックチェック */ | |
| 443 /***************************************************************************/ | |
| 444 WBLOCK bs_pll_lock = { | |
| 445 0, | |
| 446 2, | |
| 447 {0xFE, 0xC1} | |
| 448 }; | |
| 449 /***************************************************************************/ | |
| 450 /* TMCC取得 */ | |
| 451 /***************************************************************************/ | |
| 452 WBLOCK bs_tmcc_get_1 = { | |
| 453 0, | |
| 454 2, | |
| 455 {0x03, 0x01} | |
| 456 }; | |
| 457 WBLOCK bs_tmcc_get_2 = { | |
| 458 0, | |
| 459 1, | |
| 460 {0xC3} | |
| 461 }; | |
| 462 /***************************************************************************/ | |
| 463 /* TMCC取得 */ | |
| 464 /***************************************************************************/ | |
| 465 WBLOCK bs_get_slot_ts_id_1 = { | |
| 466 0, | |
| 467 1, | |
| 468 {0xCE} | |
| 469 }; | |
| 470 WBLOCK bs_get_slot_ts_id_2 = { | |
| 471 0, | |
| 472 1, | |
| 473 {0xD2} | |
| 474 }; | |
| 475 WBLOCK bs_get_slot_ts_id_3 = { | |
| 476 0, | |
| 477 1, | |
| 478 {0xD6} | |
| 479 }; | |
| 480 WBLOCK bs_get_slot_ts_id_4 = { | |
| 481 0, | |
| 482 1, | |
| 483 {0xDA} | |
| 484 }; | |
| 485 /***************************************************************************/ | |
| 486 /* TS-IDロック */ | |
| 487 /***************************************************************************/ | |
| 488 WBLOCK bs_set_ts_lock = { | |
| 489 0, | |
| 490 3, | |
| 491 {0x8F, 0x00, 0x00} | |
| 492 }; | |
| 493 /***************************************************************************/ | |
| 494 /* TS-ID取得 */ | |
| 495 /***************************************************************************/ | |
| 496 WBLOCK bs_get_ts_lock = { | |
| 497 0, | |
| 498 1, | |
| 499 {0xE6} | |
| 500 }; | |
| 501 /***************************************************************************/ | |
| 502 /* スロット取得 */ | |
| 503 /***************************************************************************/ | |
| 504 WBLOCK bs_get_slot = { | |
| 505 0, | |
| 506 1, | |
| 507 {0xE8} | |
| 508 }; | |
| 509 /***************************************************************************/ | |
| 510 /* CN/AGC/MAXAGC取得 */ | |
| 511 /***************************************************************************/ | |
|
9
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
|
512 WBLOCK bs_get_signal1 = { |
| 0 | 513 0, |
| 514 1, | |
| 515 {0xBC} | |
| 516 }; | |
|
9
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
|
517 WBLOCK bs_get_signal2 = { |
| 0 | 518 0, |
| 519 1, | |
| 520 {0xBD} | |
| 521 }; | |
|
9
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
|
522 WBLOCK bs_get_agc = { |
| 0 | 523 0, |
| 524 1, | |
| 525 {0xBA} | |
| 526 }; | |
| 527 /***************************************************************************/ | |
| 528 /* クロック周波数誤差取得 */ | |
| 529 /***************************************************************************/ | |
| 530 WBLOCK bs_get_clock = { | |
| 531 0, | |
| 532 1, | |
| 533 {0xBE} | |
| 534 }; | |
| 535 /***************************************************************************/ | |
| 536 /* キャリア周波数誤差取得 */ | |
| 537 /***************************************************************************/ | |
| 538 WBLOCK bs_get_carrir = { | |
| 539 0, | |
| 540 1, | |
| 541 {0xBB} | |
| 542 }; | |
| 543 /***************************************************************************/ | |
| 544 /* 周波数設定テーブル */ | |
| 545 /* BSに関してのみ。とりあえずテーブルとしたが、計算で算出出来るなら */ | |
| 546 /* 計算で算出させる。 */ | |
| 547 /***************************************************************************/ | |
| 548 /***************************************************************************/ | |
| 549 /* BS共通テーブル */ | |
| 550 /***************************************************************************/ | |
| 551 WBLOCK bs_com_step2 = { | |
| 552 0, | |
| 553 3, | |
| 554 {0xFE, 0xC0, 0xE4} | |
| 555 }; | |
| 556 /***************************************************************************/ | |
| 557 /* BS-1 */ | |
| 558 /***************************************************************************/ | |
| 559 WBLOCK bs_1_step1 = { | |
| 560 0, | |
| 561 6, | |
| 562 {0xFE, 0xC0, 0x48, 0x29, 0xE0, 0xD2} | |
| 563 }; | |
| 564 WBLOCK bs_1_step3 = { | |
| 565 0, | |
| 566 4, | |
| 567 {0xFE, 0xC0, 0xF4, 0xD6} | |
| 568 }; | |
| 569 /***************************************************************************/ | |
| 570 /* BS-3 */ | |
| 571 /***************************************************************************/ | |
| 572 WBLOCK bs_3_step1 = { | |
| 573 0, | |
| 574 6, | |
| 575 {0xFE, 0xC0, 0x44, 0x40, 0xE0, 0xE2} | |
| 576 }; | |
| 577 WBLOCK bs_3_step3 = { | |
| 578 0, | |
| 579 4, | |
| 580 {0xFE, 0xC0, 0xF4, 0xE6} | |
| 581 }; | |
| 582 /***************************************************************************/ | |
| 583 /* BS-5 */ | |
| 584 /***************************************************************************/ | |
| 585 WBLOCK bs_5_step1 = { | |
| 586 0, | |
| 587 6, | |
| 588 {0xFE, 0xC0, 0x44, 0x66, 0xE0, 0xE2} | |
| 589 }; | |
| 590 WBLOCK bs_5_step3 = { | |
| 591 0, | |
| 592 4, | |
| 593 {0xFE, 0xC0, 0xF4, 0xE6} | |
| 594 }; | |
| 595 /***************************************************************************/ | |
| 596 /* BS-7 */ | |
| 597 /***************************************************************************/ | |
| 598 WBLOCK bs_7_step1 = { | |
| 599 0, | |
| 600 6, | |
| 601 {0xFE, 0xC0, 0x44, 0x8D, 0xE0, 0x20} | |
| 602 }; | |
| 603 WBLOCK bs_7_step3 = { | |
| 604 0, | |
| 605 4, | |
| 606 {0xFE, 0xC0, 0xF4, 0x24} | |
| 607 }; | |
| 608 /***************************************************************************/ | |
| 609 /* BS-9 */ | |
| 610 /***************************************************************************/ | |
| 611 WBLOCK bs_9_step1 = { | |
| 612 0, | |
| 613 6, | |
| 614 {0xFE, 0xC0, 0x44, 0xB3, 0xE0, 0x20} | |
| 615 }; | |
| 616 WBLOCK bs_9_step3 = { | |
| 617 0, | |
| 618 4, | |
| 619 {0xFE, 0xC0, 0xF4, 0x24} | |
| 620 }; | |
| 621 /***************************************************************************/ | |
| 622 /* BS-11 */ | |
| 623 /***************************************************************************/ | |
| 624 WBLOCK bs_11_step1 = { | |
| 625 0, | |
| 626 6, | |
| 627 {0xFE, 0xC0, 0x44, 0xD9, 0xE0, 0x20} | |
| 628 }; | |
| 629 WBLOCK bs_11_step3 = { | |
| 630 0, | |
| 631 4, | |
| 632 {0xFE, 0xC0, 0xF4, 0x24} | |
| 633 }; | |
| 634 /***************************************************************************/ | |
| 635 /* BS-13 */ | |
| 636 /***************************************************************************/ | |
| 637 WBLOCK bs_13_step1 = { | |
| 638 0, | |
| 639 6, | |
| 640 {0xFE, 0xC0, 0x45, 0x00, 0xE0, 0x20} | |
| 641 }; | |
| 642 WBLOCK bs_13_step3 = { | |
| 643 0, | |
| 644 4, | |
| 645 {0xFE, 0xC0, 0xF4, 0x24} | |
| 646 }; | |
| 647 /***************************************************************************/ | |
| 648 /* BS-15 */ | |
| 649 /***************************************************************************/ | |
| 650 WBLOCK bs_15_step1 = { | |
| 651 0, | |
| 652 6, | |
| 653 {0xFE, 0xC0, 0x45, 0x26, 0xE0, 0x40} | |
| 654 }; | |
| 655 WBLOCK bs_15_step3 = { | |
| 656 0, | |
| 657 4, | |
| 658 {0xFE, 0xC0, 0xF4, 0x44} | |
| 659 }; | |
| 660 /***************************************************************************/ | |
| 661 /* BS-17 */ | |
| 662 /***************************************************************************/ | |
| 663 WBLOCK bs_17_step1 = { | |
| 664 0, | |
| 665 6, | |
|
120
3914cc1b2375
- adapted to 3.x kernels
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
102
diff
changeset
|
666 {0xFE, 0xC0, 0x45, 0x4C, 0xE0, 0x40} |
| 0 | 667 }; |
| 668 WBLOCK bs_17_step3 = { | |
| 669 0, | |
| 670 4, | |
| 671 {0xFE, 0xC0, 0xF4, 0X44} | |
| 672 }; | |
| 673 /***************************************************************************/ | |
| 674 /* BS-19 */ | |
| 675 /***************************************************************************/ | |
| 676 WBLOCK bs_19_step1 = { | |
| 677 0, | |
| 678 6, | |
| 679 {0xFE, 0xC0, 0x45, 0x73, 0xE0, 0x40} | |
| 680 }; | |
| 681 WBLOCK bs_19_step3 = { | |
| 682 0, | |
| 683 4, | |
| 684 {0xFE, 0xC0, 0xF4, 0x44} | |
| 685 }; | |
| 686 /***************************************************************************/ | |
| 687 /* BS-21 */ | |
| 688 /***************************************************************************/ | |
| 689 WBLOCK bs_21_step1 = { | |
| 690 0, | |
| 691 6, | |
| 692 {0xFE, 0xC0, 0x45, 0x99, 0xE0, 0x40} | |
| 693 }; | |
| 694 WBLOCK bs_21_step3 = { | |
| 695 0, | |
| 696 4, | |
| 697 {0xFE, 0xC0, 0xF4, 0x44} | |
| 698 }; | |
| 699 /***************************************************************************/ | |
| 700 /* BS-23 */ | |
| 701 /***************************************************************************/ | |
| 702 WBLOCK bs_23_step1 = { | |
| 703 0, | |
| 704 6, | |
| 705 {0xFE, 0xC0, 0x45, 0xBF, 0xE0, 0x60} | |
| 706 }; | |
| 707 WBLOCK bs_23_step3 = { | |
| 708 0, | |
| 709 4, | |
| 710 {0xFE, 0xC0, 0xF4, 0x64} | |
| 711 }; | |
| 712 | |
| 713 /***************************************************************************/ | |
| 714 /* ND 2 */ | |
| 715 /***************************************************************************/ | |
| 716 WBLOCK nd_2_step1 = { | |
| 717 0, | |
| 718 6, | |
| 719 {0xFE, 0xC0, 0x46, 0x4D, 0xE0, 0x60} | |
| 720 }; | |
| 721 WBLOCK nd_2_step3 = { | |
| 722 0, | |
| 723 4, | |
| 724 {0xFE, 0xC0, 0xF4, 0x64} | |
| 725 }; | |
| 726 | |
| 727 /***************************************************************************/ | |
| 728 /* ND 4 */ | |
| 729 /***************************************************************************/ | |
| 730 WBLOCK nd_4_step1 = { | |
| 731 0, | |
| 732 6, | |
| 733 {0xFE, 0xC0, 0x46, 0x75, 0xE0, 0x80} | |
| 734 }; | |
| 735 WBLOCK nd_4_step3 = { | |
| 736 0, | |
| 737 4, | |
| 738 {0xFE, 0xC0, 0xF4, 0x84} | |
| 739 }; | |
| 740 | |
| 741 /***************************************************************************/ | |
| 742 /* ND 6 */ | |
| 743 /***************************************************************************/ | |
| 744 WBLOCK nd_6_step1 = { | |
| 745 0, | |
| 746 6, | |
| 747 {0xFE, 0xC0, 0x46, 0x9D, 0xE0, 0x80} | |
| 748 }; | |
| 749 WBLOCK nd_6_step3 = { | |
| 750 0, | |
| 751 4, | |
| 752 {0xFE, 0xC0, 0xF4, 0x84} | |
| 753 }; | |
| 754 | |
| 755 /***************************************************************************/ | |
| 756 /* ND 8 */ | |
| 757 /***************************************************************************/ | |
| 758 WBLOCK nd_8_step1 = { | |
| 759 0, | |
| 760 6, | |
| 761 {0xFE, 0xC0, 0x46, 0xC5, 0xE0, 0x80} | |
| 762 }; | |
| 763 WBLOCK nd_8_step3 = { | |
| 764 0, | |
| 765 4, | |
| 766 {0xFE, 0xC0, 0xF4, 0x84} | |
| 767 }; | |
| 768 | |
| 769 /***************************************************************************/ | |
| 770 /* ND 10 */ | |
| 771 /***************************************************************************/ | |
| 772 WBLOCK nd_10_step1 = { | |
| 773 0, | |
| 774 6, | |
| 775 {0xFE, 0xC0, 0x46, 0xED, 0xE0, 0x80} | |
| 776 }; | |
| 777 WBLOCK nd_10_step3 = { | |
| 778 0, | |
| 779 4, | |
| 780 {0xFE, 0xC0, 0xF4, 0x84} | |
| 781 }; | |
| 782 | |
| 783 /***************************************************************************/ | |
| 784 /* ND 12 */ | |
| 785 /***************************************************************************/ | |
| 786 WBLOCK nd_12_step1 = { | |
| 787 0, | |
| 788 6, | |
| 789 {0xFE, 0xC0, 0x47, 0x15, 0xE0, 0xA0} | |
| 790 }; | |
| 791 WBLOCK nd_12_step3 = { | |
| 792 0, | |
| 793 4, | |
| 794 {0xFE, 0xC0, 0xF4, 0xA4} | |
| 795 }; | |
| 796 | |
| 797 /***************************************************************************/ | |
| 798 /* ND 14 */ | |
| 799 /***************************************************************************/ | |
| 800 WBLOCK nd_14_step1 = { | |
| 801 0, | |
| 802 6, | |
| 803 {0xFE, 0xC0, 0x47, 0x3D, 0xE0, 0xA0} | |
| 804 }; | |
| 805 WBLOCK nd_14_step3 = { | |
| 806 0, | |
| 807 4, | |
| 808 {0xFE, 0xC0, 0xF4, 0xA4} | |
| 809 }; | |
| 810 | |
| 811 /***************************************************************************/ | |
| 812 /* ND 16 */ | |
| 813 /***************************************************************************/ | |
| 814 WBLOCK nd_16_step1 = { | |
| 815 0, | |
| 816 6, | |
| 817 {0xFE, 0xC0, 0x47, 0x65, 0xE0, 0xA0} | |
| 818 }; | |
| 819 WBLOCK nd_16_step3 = { | |
| 820 0, | |
| 821 4, | |
| 822 {0xFE, 0xC0, 0xF4, 0xA4} | |
| 823 }; | |
| 824 | |
| 825 /***************************************************************************/ | |
| 826 /* ND 18 */ | |
| 827 /***************************************************************************/ | |
| 828 WBLOCK nd_18_step1 = { | |
| 829 0, | |
| 830 6, | |
| 831 {0xFE, 0xC0, 0x47, 0x8D, 0xE0, 0xA0} | |
| 832 }; | |
| 833 WBLOCK nd_18_step3 = { | |
| 834 0, | |
| 835 4, | |
| 836 {0xFE, 0xC0, 0xF4, 0xA4} | |
| 837 }; | |
| 838 | |
| 839 /***************************************************************************/ | |
| 840 /* ND 20 */ | |
| 841 /***************************************************************************/ | |
| 842 WBLOCK nd_20_step1 = { | |
| 843 0, | |
| 844 6, | |
| 845 {0xFE, 0xC0, 0x47, 0xB5, 0xE0, 0xC0} | |
| 846 }; | |
| 847 WBLOCK nd_20_step3 = { | |
| 848 0, | |
| 849 4, | |
| 850 {0xFE, 0xC0, 0xF4, 0xC4} | |
| 851 }; | |
| 852 | |
| 853 /***************************************************************************/ | |
| 854 /* ND 22 */ | |
| 855 /***************************************************************************/ | |
| 856 WBLOCK nd_22_step1 = { | |
| 857 0, | |
| 858 6, | |
| 859 {0xFE, 0xC0, 0x47, 0xDD, 0xE0, 0xC0} | |
| 860 }; | |
| 861 WBLOCK nd_22_step3 = { | |
| 862 0, | |
| 863 4, | |
| 864 {0xFE, 0xC0, 0xF4, 0xC4} | |
| 865 }; | |
| 866 | |
| 867 /***************************************************************************/ | |
| 868 /* ND 24 */ | |
| 869 /***************************************************************************/ | |
| 870 WBLOCK nd_24_step1 = { | |
| 871 0, | |
| 872 6, | |
| 873 {0xFE, 0xC0, 0x48, 0x05, 0xE0, 0xC0} | |
| 874 }; | |
| 875 WBLOCK nd_24_step3 = { | |
| 876 0, | |
| 877 4, | |
| 878 {0xFE, 0xC0, 0xF4, 0xC4} | |
| 879 }; | |
| 880 | |
| 881 /***************************************************************************/ | |
| 882 /* ND 1 */ | |
| 883 /***************************************************************************/ | |
| 884 WBLOCK nd_1_step1 = { | |
| 885 0, | |
| 886 6, | |
| 887 {0xFE, 0xC0, 0x46, 0x39, 0xE0, 0x60} | |
| 888 }; | |
| 889 WBLOCK nd_1_step3 = { | |
| 890 0, | |
| 891 4, | |
| 892 {0xFE, 0xC0, 0xF4, 0x64} | |
| 893 }; | |
| 894 | |
| 895 /***************************************************************************/ | |
| 896 /* ND 3 */ | |
| 897 /***************************************************************************/ | |
| 898 WBLOCK nd_3_step1 = { | |
| 899 0, | |
| 900 6, | |
| 901 {0xFE, 0xC0, 0x46, 0x61, 0xE0, 0x80} | |
| 902 }; | |
| 903 WBLOCK nd_3_step3 = { | |
| 904 0, | |
| 905 4, | |
| 906 {0xFE, 0xC0, 0xF4, 0x84} | |
| 907 }; | |
| 908 | |
| 909 /***************************************************************************/ | |
| 910 /* ND 5 */ | |
| 911 /***************************************************************************/ | |
| 912 WBLOCK nd_5_step1 = { | |
| 913 0, | |
| 914 6, | |
| 915 {0xFE, 0xC0, 0x46, 0x89, 0xE0, 0x80} | |
| 916 }; | |
| 917 WBLOCK nd_5_step3 = { | |
| 918 0, | |
| 919 4, | |
| 920 {0xFE, 0xC0, 0xF4, 0x84} | |
| 921 }; | |
| 922 | |
| 923 /***************************************************************************/ | |
| 924 /* ND 7 */ | |
| 925 /***************************************************************************/ | |
| 926 WBLOCK nd_7_step1 = { | |
| 927 0, | |
| 928 6, | |
| 929 {0xFE, 0xC0, 0x46, 0xB1, 0xE0, 0x80} | |
| 930 }; | |
| 931 WBLOCK nd_7_step3 = { | |
| 932 0, | |
| 933 4, | |
| 934 {0xFE, 0xC0, 0xF4, 0x84} | |
| 935 }; | |
| 936 | |
| 937 /***************************************************************************/ | |
| 938 /* ND 9 */ | |
| 939 /***************************************************************************/ | |
| 940 WBLOCK nd_9_step1 = { | |
| 941 0, | |
| 942 6, | |
| 943 {0xFE, 0xC0, 0x46, 0xD9, 0xE0, 0x80} | |
| 944 }; | |
| 945 WBLOCK nd_9_step3 = { | |
| 946 0, | |
| 947 4, | |
| 948 {0xFE, 0xC0, 0xF4, 0x84} | |
| 949 }; | |
| 950 | |
| 951 /***************************************************************************/ | |
| 952 /* ND 11 */ | |
| 953 /***************************************************************************/ | |
| 954 WBLOCK nd_11_step1 = { | |
| 955 0, | |
| 956 6, | |
| 957 {0xFE, 0xC0, 0x47, 0x01, 0xE0, 0xA0} | |
| 958 }; | |
| 959 WBLOCK nd_11_step3 = { | |
| 960 0, | |
| 961 4, | |
| 962 {0xFE, 0xC0, 0xF4, 0xA4} | |
| 963 }; | |
| 964 | |
| 965 /***************************************************************************/ | |
| 966 /* ND 13 */ | |
| 967 /***************************************************************************/ | |
| 968 WBLOCK nd_13_step1 = { | |
| 969 0, | |
| 970 6, | |
| 971 {0xFE, 0xC0, 0x47, 0x29, 0xE0, 0xA0} | |
| 972 }; | |
| 973 WBLOCK nd_13_step3 = { | |
| 974 0, | |
| 975 4, | |
| 976 {0xFE, 0xC0, 0xF4, 0xA4} | |
| 977 }; | |
| 978 | |
| 979 /***************************************************************************/ | |
| 980 /* ND 15 */ | |
| 981 /***************************************************************************/ | |
| 982 WBLOCK nd_15_step1 = { | |
| 983 0, | |
| 984 6, | |
| 985 {0xFE, 0xC0, 0x47, 0x51, 0xE0, 0xA0} | |
| 986 }; | |
| 987 WBLOCK nd_15_step3 = { | |
| 988 0, | |
| 989 4, | |
| 990 {0xFE, 0xC0, 0xF4, 0xA4} | |
| 991 }; | |
| 992 | |
| 993 /***************************************************************************/ | |
| 994 /* ND 17 */ | |
| 995 /***************************************************************************/ | |
| 996 WBLOCK nd_17_step1 = { | |
| 997 0, | |
| 998 6, | |
| 999 {0xFE, 0xC0, 0x47, 0x79, 0xE0, 0xA0} | |
| 1000 }; | |
| 1001 WBLOCK nd_17_step3 = { | |
| 1002 0, | |
| 1003 4, | |
| 1004 {0xFE, 0xC0, 0xF4, 0xA4} | |
| 1005 }; | |
| 1006 | |
| 1007 /***************************************************************************/ | |
| 1008 /* ND 19 */ | |
| 1009 /***************************************************************************/ | |
| 1010 WBLOCK nd_19_step1 = { | |
| 1011 0, | |
| 1012 6, | |
| 1013 {0xFE, 0xC0, 0x47, 0xA1, 0xE0, 0xA0} | |
| 1014 }; | |
| 1015 WBLOCK nd_19_step3 = { | |
| 1016 0, | |
| 1017 4, | |
| 1018 {0xFE, 0xC0, 0xF4, 0xA4} | |
| 1019 }; | |
| 1020 | |
| 1021 /***************************************************************************/ | |
| 1022 /* ND 21 */ | |
| 1023 /***************************************************************************/ | |
| 1024 WBLOCK nd_21_step1 = { | |
| 1025 0, | |
| 1026 6, | |
| 1027 {0xFE, 0xC0, 0x47, 0xC9, 0xE0, 0xC0} | |
| 1028 }; | |
| 1029 WBLOCK nd_21_step3 = { | |
| 1030 0, | |
| 1031 4, | |
| 1032 {0xFE, 0xC0, 0xF4, 0xC4} | |
| 1033 }; | |
| 1034 | |
| 1035 /***************************************************************************/ | |
| 1036 /* ND 23 */ | |
| 1037 /***************************************************************************/ | |
| 1038 WBLOCK nd_23_step1 = { | |
| 1039 0, | |
| 1040 6, | |
| 1041 {0xFE, 0xC0, 0x47, 0xF1, 0xE0, 0xC0} | |
| 1042 }; | |
| 1043 WBLOCK nd_23_step3 = { | |
| 1044 0, | |
| 1045 4, | |
| 1046 {0xFE, 0xC0, 0xF4, 0xC4} | |
| 1047 }; | |
| 1048 | |
| 1049 /***************************************************************************/ | |
| 1050 /* BS-周波数テーブル */ | |
| 1051 /***************************************************************************/ | |
| 1052 WBLOCK_BS_PLL bs_pll[MAX_BS_CHANNEL] = { | |
| 36 | 1053 {{&bs_1_step1, &bs_com_step2, &bs_1_step3}}, |
| 1054 {{&bs_3_step1, &bs_com_step2, &bs_3_step3}}, | |
| 1055 {{&bs_5_step1, &bs_com_step2, &bs_5_step3}}, | |
| 1056 {{&bs_7_step1, &bs_com_step2, &bs_7_step3}}, | |
| 1057 {{&bs_9_step1, &bs_com_step2, &bs_9_step3}}, | |
| 1058 {{&bs_11_step1, &bs_com_step2, &bs_11_step3}}, | |
| 1059 {{&bs_13_step1, &bs_com_step2, &bs_13_step3}}, | |
| 1060 {{&bs_15_step1, &bs_com_step2, &bs_15_step3}}, | |
| 1061 {{&bs_17_step1, &bs_com_step2, &bs_17_step3}}, | |
| 1062 {{&bs_19_step1, &bs_com_step2, &bs_19_step3}}, | |
| 1063 {{&bs_21_step1, &bs_com_step2, &bs_21_step3}}, | |
| 1064 {{&bs_23_step1, &bs_com_step2, &bs_21_step3}}, | |
| 1065 {{&nd_2_step1, &bs_com_step2, &nd_2_step3}}, | |
| 1066 {{&nd_4_step1, &bs_com_step2, &nd_4_step3}}, | |
| 1067 {{&nd_6_step1, &bs_com_step2, &nd_6_step3}}, | |
| 1068 {{&nd_8_step1, &bs_com_step2, &nd_8_step3}}, | |
| 1069 {{&nd_10_step1, &bs_com_step2, &nd_10_step3}}, | |
| 1070 {{&nd_12_step1, &bs_com_step2, &nd_12_step3}}, | |
| 1071 {{&nd_14_step1, &bs_com_step2, &nd_14_step3}}, | |
| 1072 {{&nd_16_step1, &bs_com_step2, &nd_16_step3}}, | |
| 1073 {{&nd_18_step1, &bs_com_step2, &nd_18_step3}}, | |
| 1074 {{&nd_20_step1, &bs_com_step2, &nd_20_step3}}, | |
| 1075 {{&nd_22_step1, &bs_com_step2, &nd_22_step3}}, | |
| 1076 {{&nd_24_step1, &bs_com_step2, &nd_24_step3}}, | |
| 1077 {{&nd_1_step1, &bs_com_step2, &nd_1_step3}}, | |
| 1078 {{&nd_3_step1, &bs_com_step2, &nd_3_step3}}, | |
| 1079 {{&nd_5_step1, &bs_com_step2, &nd_5_step3}}, | |
| 1080 {{&nd_7_step1, &bs_com_step2, &nd_7_step3}}, | |
| 1081 {{&nd_9_step1, &bs_com_step2, &nd_9_step3}}, | |
| 1082 {{&nd_11_step1, &bs_com_step2, &nd_11_step3}}, | |
| 1083 {{&nd_13_step1, &bs_com_step2, &nd_13_step3}}, | |
| 1084 {{&nd_15_step1, &bs_com_step2, &nd_15_step3}}, | |
| 1085 {{&nd_17_step1, &bs_com_step2, &nd_17_step3}}, | |
| 1086 {{&nd_19_step1, &bs_com_step2, &nd_19_step3}}, | |
| 1087 {{&nd_21_step1, &bs_com_step2, &nd_21_step3}}, | |
| 1088 {{&nd_23_step1, &bs_com_step2, &nd_23_step3}} | |
| 0 | 1089 }; |
| 1090 WBLOCK *bs_get_ts_id[(MAX_BS_TS_ID / 2)] = { | |
| 1091 &bs_get_slot_ts_id_1, | |
| 1092 &bs_get_slot_ts_id_2, | |
| 1093 &bs_get_slot_ts_id_3, | |
| 1094 &bs_get_slot_ts_id_4 | |
| 1095 }; |
