Mercurial > pt1
annotate driver/pt1_tuner_data.c @ 69:272a8fba970b
added very rough support for PT2.
| author | Yoshiki Yazawa <yaz@honeyplanet.jp> |
|---|---|
| date | Mon, 26 Oct 2009 19:46:49 +0900 |
| parents | 65c8ac567074 |
| children | 28f25ec7f962 |
| rev | line source |
|---|---|
| 0 | 1 |
| 2 #include <linux/module.h> | |
| 3 #include <linux/kernel.h> | |
| 4 #include <linux/errno.h> | |
| 5 #include <linux/pci.h> | |
| 6 #include <linux/init.h> | |
| 7 #include <linux/interrupt.h> | |
| 8 | |
| 9 #include <asm/system.h> | |
| 10 #include <asm/io.h> | |
| 11 #include <asm/irq.h> | |
| 12 #include <asm/uaccess.h> | |
| 13 | |
| 14 #include "pt1_com.h" | |
| 15 #include "pt1_pci.h" | |
| 16 #include "pt1_i2c.h" | |
| 17 #include "pt1_tuner.h" | |
| 18 #include "pt1_tuner_data.h" | |
| 19 | |
| 20 /***************************************************************************/ | |
| 21 /* 省電力テーブル */ | |
| 22 /***************************************************************************/ | |
| 23 /* | |
| 24 ISDB-Sの省電力設定 | |
| 25 C0 C1 | |
| 26 送信:7Bit Address Mode(1b/19):17:00 | |
| 27 ISDB-Sの省電力無効(2コマンド) | |
| 28 C0 C1 | |
| 29 送信:7Bit Address Mode(1B/19):fe:c0:f0:04 | |
| 30 送信:7Bit Address Mode(1B/19):17:01 | |
| 31 */ | |
| 32 WBLOCK isdb_s_wake = { | |
| 33 0, | |
| 34 4, | |
| 35 {0xFE, 0xC0, 0xF0, 0x04} | |
| 36 }; | |
| 37 WBLOCK isdb_s_sleep = { | |
| 38 0, | |
| 39 2, | |
| 40 {0x17, 0x00} | |
| 41 }; | |
| 42 /* | |
| 43 ISDB-Tの省電力設定 | |
| 44 C0 C1 | |
| 45 送信:7Bit Address Mode(1A/18):03:80 | |
| 46 | |
| 47 ISDB-Tの省電力無効(2コマンド) | |
| 48 C0 C1 | |
| 49 送信:7Bit Address Mode(1A/18):fe:c2 | |
| 50 送信:7Bit Address Mode(1A/18):03:90 | |
| 51 */ | |
| 52 | |
| 53 WBLOCK isdb_t_wake = { | |
| 54 0, | |
| 55 2, | |
| 56 {0xFE, 0xC2} | |
| 57 }; | |
| 58 WBLOCK isdb_t_sleep = { | |
| 59 0, | |
| 60 2, | |
| 61 {0x03, 0x80} | |
| 62 }; | |
| 63 | |
| 64 /***************************************************************************/ | |
| 65 /* 初期化データ定義(共通) */ | |
| 66 /***************************************************************************/ | |
| 67 WBLOCK com_initdata = { | |
| 68 0, | |
| 69 2, | |
| 70 {0x01, 0x80} | |
| 71 }; | |
| 72 | |
| 73 /***************************************************************************/ | |
| 74 /* 初期化データ定義(ISDB-S) */ | |
| 75 /***************************************************************************/ | |
| 76 // ISDB-S初期化値1 | |
| 77 WBLOCK isdb_s_init1 ={ | |
| 78 0, | |
| 79 1, | |
| 80 {0x07} | |
| 81 }; | |
| 82 // ISDB-S初期化値2 | |
| 83 WBLOCK isdb_s_init2 ={ | |
| 84 0, | |
| 85 2, | |
| 86 {0x04, 0x02} | |
| 87 }; | |
| 88 | |
| 89 // ISDB-S初期化値3 | |
| 90 WBLOCK isdb_s_init3 ={ | |
| 91 0, | |
| 92 2, | |
|
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
93 {0x0D, 0x55} //pt1 only |
| 0 | 94 }; |
| 95 // ISDB-S初期化値4 | |
| 96 WBLOCK isdb_s_init4 ={ | |
| 97 0, | |
| 98 2, | |
| 99 {0x11, 0x40} | |
| 100 }; | |
| 101 // ISDB-S初期化値5 | |
| 102 WBLOCK isdb_s_init5 ={ | |
| 103 0, | |
| 104 2, | |
| 105 {0x13, 0x80} | |
| 106 }; | |
| 107 // ISDB-S初期化値6 | |
| 108 WBLOCK isdb_s_init6 ={ | |
| 109 0, | |
| 110 2, | |
| 111 {0x17, 0x01} | |
| 112 }; | |
| 113 // ISDB-S初期化値7 | |
| 114 WBLOCK isdb_s_init7 ={ | |
| 115 0, | |
| 116 2, | |
| 117 {0x1C, 0x0A} | |
| 118 }; | |
| 119 // ISDB-S初期化値8 | |
| 120 WBLOCK isdb_s_init8 ={ | |
| 121 0, | |
| 122 2, | |
| 123 {0x1D, 0xAA} | |
| 124 }; | |
| 125 // ISDB-S初期化値9 | |
| 126 WBLOCK isdb_s_init9 ={ | |
| 127 0, | |
| 128 2, | |
| 129 {0x1E, 0x20} | |
| 130 }; | |
| 131 // ISDB-S初期化値10 | |
| 132 WBLOCK isdb_s_init10 ={ | |
| 133 0, | |
| 134 2, | |
| 135 {0x1F, 0x88} | |
| 136 }; | |
| 137 // ISDB-S初期化値11 | |
| 138 WBLOCK isdb_s_init11 ={ | |
| 139 0, | |
| 140 2, | |
| 141 {0x51, 0xB0} | |
| 142 }; | |
| 143 // ISDB-S初期化値12 | |
| 144 WBLOCK isdb_s_init12 ={ | |
| 145 0, | |
| 146 2, | |
| 147 {0x52, 0x89} | |
| 148 }; | |
| 149 // ISDB-S初期化値13 | |
| 150 WBLOCK isdb_s_init13 ={ | |
| 151 0, | |
| 152 2, | |
| 153 {0x53, 0xB3} | |
| 154 }; | |
| 155 // ISDB-S初期化値14 | |
| 156 WBLOCK isdb_s_init14 ={ | |
| 157 0, | |
| 158 2, | |
| 159 {0x5A, 0x2D} | |
| 160 }; | |
| 161 // ISDB-S初期化値15 | |
| 162 WBLOCK isdb_s_init15 ={ | |
| 163 0, | |
| 164 2, | |
| 165 {0x5B, 0xD3} | |
| 166 }; | |
| 167 // ISDB-S初期化値16 | |
| 168 WBLOCK isdb_s_init16 ={ | |
| 169 0, | |
| 170 2, | |
| 171 {0x85, 0x69} | |
| 172 }; | |
| 173 // ISDB-S初期化値17 | |
| 174 WBLOCK isdb_s_init17 ={ | |
| 175 0, | |
| 176 2, | |
| 177 {0x87, 0x04} | |
| 178 }; | |
| 179 // ISDB-S初期化値18 | |
| 180 WBLOCK isdb_s_init18 ={ | |
| 181 0, | |
| 182 2, | |
|
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
183 // {0x8E, 0x02} |
|
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
184 {0x8E, 0x26} |
| 0 | 185 }; |
| 186 // ISDB-S初期化値19 | |
| 187 WBLOCK isdb_s_init19 ={ | |
| 188 0, | |
| 189 2, | |
| 190 {0xA3, 0xF7} | |
| 191 }; | |
| 192 // ISDB-S初期化値20 | |
| 193 WBLOCK isdb_s_init20 ={ | |
| 194 0, | |
| 195 2, | |
| 196 {0xA5, 0xC0} | |
| 197 }; | |
| 198 // ISDB-S初期化値21 | |
|
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
199 WBLOCK isdb_s_init21 ={ |
| 0 | 200 0, |
| 201 4, | |
| 202 {0xFE, 0xC0, 0xF0, 0x04} | |
| 203 }; | |
| 204 /***************************************************************************/ | |
| 205 /* 初期化データ定義(ISDB-T) */ | |
| 206 /***************************************************************************/ | |
| 207 // ISDB-T初期化値1 | |
| 208 WBLOCK isdb_t_init1 ={ | |
| 209 0, | |
| 210 2, | |
| 211 {0x03, 0x90} | |
| 212 }; | |
| 213 // ISDB-T初期化値2 | |
| 214 WBLOCK isdb_t_init2 ={ | |
| 215 0, | |
| 216 2, | |
|
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
217 {0x14, 0x8F} //pt1 only |
| 0 | 218 }; |
| 219 // ISDB-T初期化値3 | |
| 220 WBLOCK isdb_t_init3 ={ | |
| 221 0, | |
| 222 2, | |
| 223 {0x1C, 0x2A} | |
| 224 }; | |
| 225 // ISDB-T初期化値4 | |
| 226 WBLOCK isdb_t_init4 ={ | |
| 227 0, | |
| 228 2, | |
| 229 {0x1D, 0xA8} | |
| 230 }; | |
| 231 // ISDB-T初期化値5 | |
| 232 WBLOCK isdb_t_init5 ={ | |
| 233 0, | |
| 234 2, | |
| 235 {0x1E, 0xA2} | |
| 236 }; | |
| 237 // ISDB-T初期化値6 | |
| 238 WBLOCK isdb_t_init6 ={ | |
| 239 0, | |
| 240 2, | |
| 241 {0x22, 0x83} | |
| 242 }; | |
| 243 // ISDB-T初期化値7 | |
| 244 WBLOCK isdb_t_init7 ={ | |
| 245 0, | |
| 246 2, | |
|
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
247 {0x31, 0x0D} //pt1 |
| 0 | 248 }; |
| 249 // ISDB-T初期化値8 | |
| 250 WBLOCK isdb_t_init8 ={ | |
| 251 0, | |
| 252 2, | |
|
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
253 {0x32, 0xE0} //pt1 |
| 0 | 254 }; |
| 255 // ISDB-T初期化値9 | |
| 256 WBLOCK isdb_t_init9 ={ | |
| 257 0, | |
| 258 2, | |
|
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
259 {0x39, 0xD3} //pt1 |
| 0 | 260 }; |
| 261 // ISDB-T初期化値10 | |
| 262 WBLOCK isdb_t_init10 ={ | |
| 263 0, | |
| 264 2, | |
| 265 {0x3A, 0x00} | |
| 266 }; | |
| 267 // ISDB-T初期化値11 | |
| 268 WBLOCK isdb_t_init11 ={ | |
| 269 0, | |
| 270 2, | |
| 271 {0x5C, 0x40} | |
| 272 }; | |
| 273 // ISDB-T初期化値12 | |
| 274 WBLOCK isdb_t_init12 ={ | |
| 275 0, | |
| 276 2, | |
| 277 {0x5F, 0x80} | |
| 278 }; | |
| 279 // ISDB-T初期化値13 | |
| 280 WBLOCK isdb_t_init13 ={ | |
| 281 0, | |
| 282 2, | |
|
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
283 // {0x75, 0x02} |
|
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
284 {0x75, 0x0a} |
| 0 | 285 }; |
| 286 // ISDB-T初期化値14 | |
| 287 WBLOCK isdb_t_init14 ={ | |
| 288 0, | |
| 289 2, | |
|
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
290 // {0x76, 0x4E} |
|
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
291 {0x76, 0x4c} |
| 0 | 292 }; |
| 293 // ISDB-T初期化値15 | |
| 294 WBLOCK isdb_t_init15 ={ | |
| 295 0, | |
| 296 2, | |
| 297 {0x77, 0x03} | |
| 298 }; | |
| 299 // ISDB-T初期化値16 | |
| 300 WBLOCK isdb_t_init16 ={ | |
| 301 0, | |
| 302 2, | |
| 303 {0xEF, 0x01} | |
| 304 }; | |
| 305 // ISDB-T初期化値17 | |
|
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
306 WBLOCK isdb_t_init17 ={ |
| 0 | 307 0, |
| 308 7, | |
| 309 {0xFE, 0xC2, 0x01, 0x8F, 0xC1, 0x80, 0x80} | |
| 310 }; | |
| 311 /***************************************************************************/ | |
| 312 /* 初期化データブロック定義(ISDB-S) */ | |
| 313 /***************************************************************************/ | |
|
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
314 WBLOCK *isdb_s_initial_pt1[MAX_ISDB_S_INIT] = |
| 0 | 315 { |
| 316 &isdb_s_init2, &isdb_s_init3, &isdb_s_init4, &isdb_s_init5, | |
| 317 &isdb_s_init6, &isdb_s_init7, &isdb_s_init8, &isdb_s_init9, | |
| 318 &isdb_s_init10, &isdb_s_init11, &isdb_s_init12, &isdb_s_init13, | |
| 319 &isdb_s_init14, &isdb_s_init15, &isdb_s_init16, &isdb_s_init17, | |
| 320 &isdb_s_init18, &isdb_s_init19, &isdb_s_init20 | |
| 321 }; | |
|
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
322 WBLOCK *isdb_s_initial_pt2[MAX_ISDB_S_INIT] = |
|
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
323 { |
|
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
324 &isdb_s_init2, &isdb_s_init4, &isdb_s_init5, |
|
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
325 &isdb_s_init6, &isdb_s_init7, &isdb_s_init8, &isdb_s_init9, |
|
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
326 &isdb_s_init10, &isdb_s_init11, &isdb_s_init12, &isdb_s_init13, |
|
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
327 &isdb_s_init14, &isdb_s_init15, &isdb_s_init16, &isdb_s_init17, |
|
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
328 &isdb_s_init18, &isdb_s_init19, &isdb_s_init20 |
|
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
329 }; |
| 0 | 330 /***************************************************************************/ |
| 331 /* 初期化データブロック定義(ISDB-T) */ | |
| 332 /***************************************************************************/ | |
|
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
333 WBLOCK *isdb_t_initial_pt1[MAX_ISDB_T_INIT] = |
| 0 | 334 { |
| 335 &isdb_t_init1, &isdb_t_init2, &isdb_t_init3, &isdb_t_init4, | |
| 336 &isdb_t_init5, &isdb_t_init6, &isdb_t_init7, &isdb_t_init8, | |
| 337 &isdb_t_init9, &isdb_t_init10, &isdb_t_init11, &isdb_t_init12, | |
| 338 &isdb_t_init13, &isdb_t_init14, &isdb_t_init15, &isdb_t_init16 | |
| 339 }; | |
|
69
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
340 WBLOCK *isdb_t_initial_pt2[MAX_ISDB_T_INIT] = |
|
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
341 { |
|
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
342 &isdb_t_init1, &isdb_t_init3, &isdb_t_init4, |
|
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
343 &isdb_t_init5, &isdb_t_init6, |
|
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
344 &isdb_t_init10, &isdb_t_init11, &isdb_t_init12, |
|
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
345 &isdb_t_init13, &isdb_t_init14, &isdb_t_init15, &isdb_t_init16 |
|
272a8fba970b
added very rough support for PT2.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
36
diff
changeset
|
346 }; |
| 0 | 347 /***************************************************************************/ |
| 348 /* 地上デジタル用データ */ | |
| 349 /***************************************************************************/ | |
| 350 /***************************************************************************/ | |
| 351 /* 周波数設定基本テーブル */ | |
| 352 /* 0〜1: 固定 */ | |
| 353 /* 2〜3: 計算結果 */ | |
| 354 /* 4〜5: 追加計算結果 */ | |
| 355 /***************************************************************************/ | |
| 356 | |
| 357 WBLOCK isdb_t_pll_base = { | |
| 358 0, | |
| 359 2, | |
| 360 {0xFE, 0xC2, 0, 0, 0, 0, 0, 0} | |
| 361 }; | |
| 362 /***************************************************************************/ | |
| 363 /* 地デジ周波数ロックチェック */ | |
| 364 /***************************************************************************/ | |
| 365 WBLOCK isdb_t_pll_lock = { | |
| 366 0, | |
| 367 2, | |
| 368 {0xFE, 0xC3} | |
| 369 }; | |
| 370 | |
| 371 WBLOCK isdb_t_check_tune = { | |
| 372 0, | |
| 373 2, | |
| 374 {0x01, 0x40} | |
| 375 }; | |
| 376 | |
| 377 WBLOCK isdb_t_tune_read = { | |
| 378 0, | |
| 379 1, | |
| 380 {0x80} | |
| 381 }; | |
| 382 WBLOCK isdb_t_tmcc_read_1 = { | |
| 383 0, | |
| 384 1, | |
| 385 {0xB2} | |
| 386 }; | |
| 387 WBLOCK isdb_t_tmcc_read_2 = { | |
| 388 0, | |
| 389 1, | |
| 390 {0xB6} | |
| 391 }; | |
| 392 /***************************************************************************/ | |
| 393 /* 地デジ周波数ロックチェック */ | |
| 394 /***************************************************************************/ | |
|
9
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
|
395 WBLOCK isdb_t_signal1 = { |
| 0 | 396 0, |
| 397 1, | |
| 398 {0x8C} | |
| 399 }; | |
|
9
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
|
400 WBLOCK isdb_t_signal2 = { |
| 0 | 401 0, |
| 402 1, | |
| 403 {0x8D} | |
| 404 }; | |
| 405 WBLOCK isdb_t_agc2 = { | |
| 406 0, | |
| 407 1, | |
| 408 {0x82} | |
| 409 }; | |
| 410 WBLOCK isdb_t_lockedt1 = { | |
| 411 0, | |
| 412 1, | |
| 413 {0x96} | |
| 414 }; | |
| 415 WBLOCK isdb_t_lockedt2 = { | |
| 416 0, | |
| 417 1, | |
| 418 {0xB0} | |
| 419 }; | |
| 420 WBLOCK isdb_t_get_clock = { | |
| 421 0, | |
| 422 1, | |
| 423 {0x86} | |
| 424 }; | |
| 425 WBLOCK isdb_t_get_carrir = { | |
| 426 0, | |
| 427 1, | |
| 428 {0x84} | |
| 429 }; | |
| 430 | |
| 431 /***************************************************************************/ | |
| 432 /* 地デジ用データ */ | |
| 433 /***************************************************************************/ | |
| 434 | |
| 435 /***************************************************************************/ | |
| 436 /* BS用データ */ | |
| 437 /***************************************************************************/ | |
| 438 /***************************************************************************/ | |
| 439 /* BS周波数ロックチェック */ | |
| 440 /***************************************************************************/ | |
| 441 WBLOCK bs_pll_lock = { | |
| 442 0, | |
| 443 2, | |
| 444 {0xFE, 0xC1} | |
| 445 }; | |
| 446 /***************************************************************************/ | |
| 447 /* TMCC取得 */ | |
| 448 /***************************************************************************/ | |
| 449 WBLOCK bs_tmcc_get_1 = { | |
| 450 0, | |
| 451 2, | |
| 452 {0x03, 0x01} | |
| 453 }; | |
| 454 WBLOCK bs_tmcc_get_2 = { | |
| 455 0, | |
| 456 1, | |
| 457 {0xC3} | |
| 458 }; | |
| 459 /***************************************************************************/ | |
| 460 /* TMCC取得 */ | |
| 461 /***************************************************************************/ | |
| 462 WBLOCK bs_get_slot_ts_id_1 = { | |
| 463 0, | |
| 464 1, | |
| 465 {0xCE} | |
| 466 }; | |
| 467 WBLOCK bs_get_slot_ts_id_2 = { | |
| 468 0, | |
| 469 1, | |
| 470 {0xD2} | |
| 471 }; | |
| 472 WBLOCK bs_get_slot_ts_id_3 = { | |
| 473 0, | |
| 474 1, | |
| 475 {0xD6} | |
| 476 }; | |
| 477 WBLOCK bs_get_slot_ts_id_4 = { | |
| 478 0, | |
| 479 1, | |
| 480 {0xDA} | |
| 481 }; | |
| 482 /***************************************************************************/ | |
| 483 /* TS-IDロック */ | |
| 484 /***************************************************************************/ | |
| 485 WBLOCK bs_set_ts_lock = { | |
| 486 0, | |
| 487 3, | |
| 488 {0x8F, 0x00, 0x00} | |
| 489 }; | |
| 490 /***************************************************************************/ | |
| 491 /* TS-ID取得 */ | |
| 492 /***************************************************************************/ | |
| 493 WBLOCK bs_get_ts_lock = { | |
| 494 0, | |
| 495 1, | |
| 496 {0xE6} | |
| 497 }; | |
| 498 /***************************************************************************/ | |
| 499 /* スロット取得 */ | |
| 500 /***************************************************************************/ | |
| 501 WBLOCK bs_get_slot = { | |
| 502 0, | |
| 503 1, | |
| 504 {0xE8} | |
| 505 }; | |
| 506 /***************************************************************************/ | |
| 507 /* CN/AGC/MAXAGC取得 */ | |
| 508 /***************************************************************************/ | |
|
9
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
|
509 WBLOCK bs_get_signal1 = { |
| 0 | 510 0, |
| 511 1, | |
| 512 {0xBC} | |
| 513 }; | |
|
9
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
|
514 WBLOCK bs_get_signal2 = { |
| 0 | 515 0, |
| 516 1, | |
| 517 {0xBD} | |
| 518 }; | |
|
9
07b2fc07ff48
updated to current driver to support signal strength.
Yoshiki Yazawa <yaz@honeyplanet.jp>
parents:
0
diff
changeset
|
519 WBLOCK bs_get_agc = { |
| 0 | 520 0, |
| 521 1, | |
| 522 {0xBA} | |
| 523 }; | |
| 524 /***************************************************************************/ | |
| 525 /* クロック周波数誤差取得 */ | |
| 526 /***************************************************************************/ | |
| 527 WBLOCK bs_get_clock = { | |
| 528 0, | |
| 529 1, | |
| 530 {0xBE} | |
| 531 }; | |
| 532 /***************************************************************************/ | |
| 533 /* キャリア周波数誤差取得 */ | |
| 534 /***************************************************************************/ | |
| 535 WBLOCK bs_get_carrir = { | |
| 536 0, | |
| 537 1, | |
| 538 {0xBB} | |
| 539 }; | |
| 540 /***************************************************************************/ | |
| 541 /* 周波数設定テーブル */ | |
| 542 /* BSに関してのみ。とりあえずテーブルとしたが、計算で算出出来るなら */ | |
| 543 /* 計算で算出させる。 */ | |
| 544 /***************************************************************************/ | |
| 545 /***************************************************************************/ | |
| 546 /* BS共通テーブル */ | |
| 547 /***************************************************************************/ | |
| 548 WBLOCK bs_com_step2 = { | |
| 549 0, | |
| 550 3, | |
| 551 {0xFE, 0xC0, 0xE4} | |
| 552 }; | |
| 553 /***************************************************************************/ | |
| 554 /* BS-1 */ | |
| 555 /***************************************************************************/ | |
| 556 WBLOCK bs_1_step1 = { | |
| 557 0, | |
| 558 6, | |
| 559 {0xFE, 0xC0, 0x48, 0x29, 0xE0, 0xD2} | |
| 560 }; | |
| 561 WBLOCK bs_1_step3 = { | |
| 562 0, | |
| 563 4, | |
| 564 {0xFE, 0xC0, 0xF4, 0xD6} | |
| 565 }; | |
| 566 /***************************************************************************/ | |
| 567 /* BS-3 */ | |
| 568 /***************************************************************************/ | |
| 569 WBLOCK bs_3_step1 = { | |
| 570 0, | |
| 571 6, | |
| 572 {0xFE, 0xC0, 0x44, 0x40, 0xE0, 0xE2} | |
| 573 }; | |
| 574 WBLOCK bs_3_step3 = { | |
| 575 0, | |
| 576 4, | |
| 577 {0xFE, 0xC0, 0xF4, 0xE6} | |
| 578 }; | |
| 579 /***************************************************************************/ | |
| 580 /* BS-5 */ | |
| 581 /***************************************************************************/ | |
| 582 WBLOCK bs_5_step1 = { | |
| 583 0, | |
| 584 6, | |
| 585 {0xFE, 0xC0, 0x44, 0x66, 0xE0, 0xE2} | |
| 586 }; | |
| 587 WBLOCK bs_5_step3 = { | |
| 588 0, | |
| 589 4, | |
| 590 {0xFE, 0xC0, 0xF4, 0xE6} | |
| 591 }; | |
| 592 /***************************************************************************/ | |
| 593 /* BS-7 */ | |
| 594 /***************************************************************************/ | |
| 595 WBLOCK bs_7_step1 = { | |
| 596 0, | |
| 597 6, | |
| 598 {0xFE, 0xC0, 0x44, 0x8D, 0xE0, 0x20} | |
| 599 }; | |
| 600 WBLOCK bs_7_step3 = { | |
| 601 0, | |
| 602 4, | |
| 603 {0xFE, 0xC0, 0xF4, 0x24} | |
| 604 }; | |
| 605 /***************************************************************************/ | |
| 606 /* BS-9 */ | |
| 607 /***************************************************************************/ | |
| 608 WBLOCK bs_9_step1 = { | |
| 609 0, | |
| 610 6, | |
| 611 {0xFE, 0xC0, 0x44, 0xB3, 0xE0, 0x20} | |
| 612 }; | |
| 613 WBLOCK bs_9_step3 = { | |
| 614 0, | |
| 615 4, | |
| 616 {0xFE, 0xC0, 0xF4, 0x24} | |
| 617 }; | |
| 618 /***************************************************************************/ | |
| 619 /* BS-11 */ | |
| 620 /***************************************************************************/ | |
| 621 WBLOCK bs_11_step1 = { | |
| 622 0, | |
| 623 6, | |
| 624 {0xFE, 0xC0, 0x44, 0xD9, 0xE0, 0x20} | |
| 625 }; | |
| 626 WBLOCK bs_11_step3 = { | |
| 627 0, | |
| 628 4, | |
| 629 {0xFE, 0xC0, 0xF4, 0x24} | |
| 630 }; | |
| 631 /***************************************************************************/ | |
| 632 /* BS-13 */ | |
| 633 /***************************************************************************/ | |
| 634 WBLOCK bs_13_step1 = { | |
| 635 0, | |
| 636 6, | |
| 637 {0xFE, 0xC0, 0x45, 0x00, 0xE0, 0x20} | |
| 638 }; | |
| 639 WBLOCK bs_13_step3 = { | |
| 640 0, | |
| 641 4, | |
| 642 {0xFE, 0xC0, 0xF4, 0x24} | |
| 643 }; | |
| 644 /***************************************************************************/ | |
| 645 /* BS-15 */ | |
| 646 /***************************************************************************/ | |
| 647 WBLOCK bs_15_step1 = { | |
| 648 0, | |
| 649 6, | |
| 650 {0xFE, 0xC0, 0x45, 0x26, 0xE0, 0x40} | |
| 651 }; | |
| 652 WBLOCK bs_15_step3 = { | |
| 653 0, | |
| 654 4, | |
| 655 {0xFE, 0xC0, 0xF4, 0x44} | |
| 656 }; | |
| 657 /***************************************************************************/ | |
| 658 /* BS-17 */ | |
| 659 /***************************************************************************/ | |
| 660 WBLOCK bs_17_step1 = { | |
| 661 0, | |
| 662 6, | |
| 663 {0xFE, 0xC0, 0x45, 0x73, 0xE0, 0x40} | |
| 664 }; | |
| 665 WBLOCK bs_17_step3 = { | |
| 666 0, | |
| 667 4, | |
| 668 {0xFE, 0xC0, 0xF4, 0X44} | |
| 669 }; | |
| 670 /***************************************************************************/ | |
| 671 /* BS-19 */ | |
| 672 /***************************************************************************/ | |
| 673 WBLOCK bs_19_step1 = { | |
| 674 0, | |
| 675 6, | |
| 676 {0xFE, 0xC0, 0x45, 0x73, 0xE0, 0x40} | |
| 677 }; | |
| 678 WBLOCK bs_19_step3 = { | |
| 679 0, | |
| 680 4, | |
| 681 {0xFE, 0xC0, 0xF4, 0x44} | |
| 682 }; | |
| 683 /***************************************************************************/ | |
| 684 /* BS-21 */ | |
| 685 /***************************************************************************/ | |
| 686 WBLOCK bs_21_step1 = { | |
| 687 0, | |
| 688 6, | |
| 689 {0xFE, 0xC0, 0x45, 0x99, 0xE0, 0x40} | |
| 690 }; | |
| 691 WBLOCK bs_21_step3 = { | |
| 692 0, | |
| 693 4, | |
| 694 {0xFE, 0xC0, 0xF4, 0x44} | |
| 695 }; | |
| 696 /***************************************************************************/ | |
| 697 /* BS-23 */ | |
| 698 /***************************************************************************/ | |
| 699 WBLOCK bs_23_step1 = { | |
| 700 0, | |
| 701 6, | |
| 702 {0xFE, 0xC0, 0x45, 0xBF, 0xE0, 0x60} | |
| 703 }; | |
| 704 WBLOCK bs_23_step3 = { | |
| 705 0, | |
| 706 4, | |
| 707 {0xFE, 0xC0, 0xF4, 0x64} | |
| 708 }; | |
| 709 | |
| 710 /***************************************************************************/ | |
| 711 /* ND 2 */ | |
| 712 /***************************************************************************/ | |
| 713 WBLOCK nd_2_step1 = { | |
| 714 0, | |
| 715 6, | |
| 716 {0xFE, 0xC0, 0x46, 0x4D, 0xE0, 0x60} | |
| 717 }; | |
| 718 WBLOCK nd_2_step3 = { | |
| 719 0, | |
| 720 4, | |
| 721 {0xFE, 0xC0, 0xF4, 0x64} | |
| 722 }; | |
| 723 | |
| 724 /***************************************************************************/ | |
| 725 /* ND 4 */ | |
| 726 /***************************************************************************/ | |
| 727 WBLOCK nd_4_step1 = { | |
| 728 0, | |
| 729 6, | |
| 730 {0xFE, 0xC0, 0x46, 0x75, 0xE0, 0x80} | |
| 731 }; | |
| 732 WBLOCK nd_4_step3 = { | |
| 733 0, | |
| 734 4, | |
| 735 {0xFE, 0xC0, 0xF4, 0x84} | |
| 736 }; | |
| 737 | |
| 738 /***************************************************************************/ | |
| 739 /* ND 6 */ | |
| 740 /***************************************************************************/ | |
| 741 WBLOCK nd_6_step1 = { | |
| 742 0, | |
| 743 6, | |
| 744 {0xFE, 0xC0, 0x46, 0x9D, 0xE0, 0x80} | |
| 745 }; | |
| 746 WBLOCK nd_6_step3 = { | |
| 747 0, | |
| 748 4, | |
| 749 {0xFE, 0xC0, 0xF4, 0x84} | |
| 750 }; | |
| 751 | |
| 752 /***************************************************************************/ | |
| 753 /* ND 8 */ | |
| 754 /***************************************************************************/ | |
| 755 WBLOCK nd_8_step1 = { | |
| 756 0, | |
| 757 6, | |
| 758 {0xFE, 0xC0, 0x46, 0xC5, 0xE0, 0x80} | |
| 759 }; | |
| 760 WBLOCK nd_8_step3 = { | |
| 761 0, | |
| 762 4, | |
| 763 {0xFE, 0xC0, 0xF4, 0x84} | |
| 764 }; | |
| 765 | |
| 766 /***************************************************************************/ | |
| 767 /* ND 10 */ | |
| 768 /***************************************************************************/ | |
| 769 WBLOCK nd_10_step1 = { | |
| 770 0, | |
| 771 6, | |
| 772 {0xFE, 0xC0, 0x46, 0xED, 0xE0, 0x80} | |
| 773 }; | |
| 774 WBLOCK nd_10_step3 = { | |
| 775 0, | |
| 776 4, | |
| 777 {0xFE, 0xC0, 0xF4, 0x84} | |
| 778 }; | |
| 779 | |
| 780 /***************************************************************************/ | |
| 781 /* ND 12 */ | |
| 782 /***************************************************************************/ | |
| 783 WBLOCK nd_12_step1 = { | |
| 784 0, | |
| 785 6, | |
| 786 {0xFE, 0xC0, 0x47, 0x15, 0xE0, 0xA0} | |
| 787 }; | |
| 788 WBLOCK nd_12_step3 = { | |
| 789 0, | |
| 790 4, | |
| 791 {0xFE, 0xC0, 0xF4, 0xA4} | |
| 792 }; | |
| 793 | |
| 794 /***************************************************************************/ | |
| 795 /* ND 14 */ | |
| 796 /***************************************************************************/ | |
| 797 WBLOCK nd_14_step1 = { | |
| 798 0, | |
| 799 6, | |
| 800 {0xFE, 0xC0, 0x47, 0x3D, 0xE0, 0xA0} | |
| 801 }; | |
| 802 WBLOCK nd_14_step3 = { | |
| 803 0, | |
| 804 4, | |
| 805 {0xFE, 0xC0, 0xF4, 0xA4} | |
| 806 }; | |
| 807 | |
| 808 /***************************************************************************/ | |
| 809 /* ND 16 */ | |
| 810 /***************************************************************************/ | |
| 811 WBLOCK nd_16_step1 = { | |
| 812 0, | |
| 813 6, | |
| 814 {0xFE, 0xC0, 0x47, 0x65, 0xE0, 0xA0} | |
| 815 }; | |
| 816 WBLOCK nd_16_step3 = { | |
| 817 0, | |
| 818 4, | |
| 819 {0xFE, 0xC0, 0xF4, 0xA4} | |
| 820 }; | |
| 821 | |
| 822 /***************************************************************************/ | |
| 823 /* ND 18 */ | |
| 824 /***************************************************************************/ | |
| 825 WBLOCK nd_18_step1 = { | |
| 826 0, | |
| 827 6, | |
| 828 {0xFE, 0xC0, 0x47, 0x8D, 0xE0, 0xA0} | |
| 829 }; | |
| 830 WBLOCK nd_18_step3 = { | |
| 831 0, | |
| 832 4, | |
| 833 {0xFE, 0xC0, 0xF4, 0xA4} | |
| 834 }; | |
| 835 | |
| 836 /***************************************************************************/ | |
| 837 /* ND 20 */ | |
| 838 /***************************************************************************/ | |
| 839 WBLOCK nd_20_step1 = { | |
| 840 0, | |
| 841 6, | |
| 842 {0xFE, 0xC0, 0x47, 0xB5, 0xE0, 0xC0} | |
| 843 }; | |
| 844 WBLOCK nd_20_step3 = { | |
| 845 0, | |
| 846 4, | |
| 847 {0xFE, 0xC0, 0xF4, 0xC4} | |
| 848 }; | |
| 849 | |
| 850 /***************************************************************************/ | |
| 851 /* ND 22 */ | |
| 852 /***************************************************************************/ | |
| 853 WBLOCK nd_22_step1 = { | |
| 854 0, | |
| 855 6, | |
| 856 {0xFE, 0xC0, 0x47, 0xDD, 0xE0, 0xC0} | |
| 857 }; | |
| 858 WBLOCK nd_22_step3 = { | |
| 859 0, | |
| 860 4, | |
| 861 {0xFE, 0xC0, 0xF4, 0xC4} | |
| 862 }; | |
| 863 | |
| 864 /***************************************************************************/ | |
| 865 /* ND 24 */ | |
| 866 /***************************************************************************/ | |
| 867 WBLOCK nd_24_step1 = { | |
| 868 0, | |
| 869 6, | |
| 870 {0xFE, 0xC0, 0x48, 0x05, 0xE0, 0xC0} | |
| 871 }; | |
| 872 WBLOCK nd_24_step3 = { | |
| 873 0, | |
| 874 4, | |
| 875 {0xFE, 0xC0, 0xF4, 0xC4} | |
| 876 }; | |
| 877 | |
| 878 /***************************************************************************/ | |
| 879 /* ND 1 */ | |
| 880 /***************************************************************************/ | |
| 881 WBLOCK nd_1_step1 = { | |
| 882 0, | |
| 883 6, | |
| 884 {0xFE, 0xC0, 0x46, 0x39, 0xE0, 0x60} | |
| 885 }; | |
| 886 WBLOCK nd_1_step3 = { | |
| 887 0, | |
| 888 4, | |
| 889 {0xFE, 0xC0, 0xF4, 0x64} | |
| 890 }; | |
| 891 | |
| 892 /***************************************************************************/ | |
| 893 /* ND 3 */ | |
| 894 /***************************************************************************/ | |
| 895 WBLOCK nd_3_step1 = { | |
| 896 0, | |
| 897 6, | |
| 898 {0xFE, 0xC0, 0x46, 0x61, 0xE0, 0x80} | |
| 899 }; | |
| 900 WBLOCK nd_3_step3 = { | |
| 901 0, | |
| 902 4, | |
| 903 {0xFE, 0xC0, 0xF4, 0x84} | |
| 904 }; | |
| 905 | |
| 906 /***************************************************************************/ | |
| 907 /* ND 5 */ | |
| 908 /***************************************************************************/ | |
| 909 WBLOCK nd_5_step1 = { | |
| 910 0, | |
| 911 6, | |
| 912 {0xFE, 0xC0, 0x46, 0x89, 0xE0, 0x80} | |
| 913 }; | |
| 914 WBLOCK nd_5_step3 = { | |
| 915 0, | |
| 916 4, | |
| 917 {0xFE, 0xC0, 0xF4, 0x84} | |
| 918 }; | |
| 919 | |
| 920 /***************************************************************************/ | |
| 921 /* ND 7 */ | |
| 922 /***************************************************************************/ | |
| 923 WBLOCK nd_7_step1 = { | |
| 924 0, | |
| 925 6, | |
| 926 {0xFE, 0xC0, 0x46, 0xB1, 0xE0, 0x80} | |
| 927 }; | |
| 928 WBLOCK nd_7_step3 = { | |
| 929 0, | |
| 930 4, | |
| 931 {0xFE, 0xC0, 0xF4, 0x84} | |
| 932 }; | |
| 933 | |
| 934 /***************************************************************************/ | |
| 935 /* ND 9 */ | |
| 936 /***************************************************************************/ | |
| 937 WBLOCK nd_9_step1 = { | |
| 938 0, | |
| 939 6, | |
| 940 {0xFE, 0xC0, 0x46, 0xD9, 0xE0, 0x80} | |
| 941 }; | |
| 942 WBLOCK nd_9_step3 = { | |
| 943 0, | |
| 944 4, | |
| 945 {0xFE, 0xC0, 0xF4, 0x84} | |
| 946 }; | |
| 947 | |
| 948 /***************************************************************************/ | |
| 949 /* ND 11 */ | |
| 950 /***************************************************************************/ | |
| 951 WBLOCK nd_11_step1 = { | |
| 952 0, | |
| 953 6, | |
| 954 {0xFE, 0xC0, 0x47, 0x01, 0xE0, 0xA0} | |
| 955 }; | |
| 956 WBLOCK nd_11_step3 = { | |
| 957 0, | |
| 958 4, | |
| 959 {0xFE, 0xC0, 0xF4, 0xA4} | |
| 960 }; | |
| 961 | |
| 962 /***************************************************************************/ | |
| 963 /* ND 13 */ | |
| 964 /***************************************************************************/ | |
| 965 WBLOCK nd_13_step1 = { | |
| 966 0, | |
| 967 6, | |
| 968 {0xFE, 0xC0, 0x47, 0x29, 0xE0, 0xA0} | |
| 969 }; | |
| 970 WBLOCK nd_13_step3 = { | |
| 971 0, | |
| 972 4, | |
| 973 {0xFE, 0xC0, 0xF4, 0xA4} | |
| 974 }; | |
| 975 | |
| 976 /***************************************************************************/ | |
| 977 /* ND 15 */ | |
| 978 /***************************************************************************/ | |
| 979 WBLOCK nd_15_step1 = { | |
| 980 0, | |
| 981 6, | |
| 982 {0xFE, 0xC0, 0x47, 0x51, 0xE0, 0xA0} | |
| 983 }; | |
| 984 WBLOCK nd_15_step3 = { | |
| 985 0, | |
| 986 4, | |
| 987 {0xFE, 0xC0, 0xF4, 0xA4} | |
| 988 }; | |
| 989 | |
| 990 /***************************************************************************/ | |
| 991 /* ND 17 */ | |
| 992 /***************************************************************************/ | |
| 993 WBLOCK nd_17_step1 = { | |
| 994 0, | |
| 995 6, | |
| 996 {0xFE, 0xC0, 0x47, 0x79, 0xE0, 0xA0} | |
| 997 }; | |
| 998 WBLOCK nd_17_step3 = { | |
| 999 0, | |
| 1000 4, | |
| 1001 {0xFE, 0xC0, 0xF4, 0xA4} | |
| 1002 }; | |
| 1003 | |
| 1004 /***************************************************************************/ | |
| 1005 /* ND 19 */ | |
| 1006 /***************************************************************************/ | |
| 1007 WBLOCK nd_19_step1 = { | |
| 1008 0, | |
| 1009 6, | |
| 1010 {0xFE, 0xC0, 0x47, 0xA1, 0xE0, 0xA0} | |
| 1011 }; | |
| 1012 WBLOCK nd_19_step3 = { | |
| 1013 0, | |
| 1014 4, | |
| 1015 {0xFE, 0xC0, 0xF4, 0xA4} | |
| 1016 }; | |
| 1017 | |
| 1018 /***************************************************************************/ | |
| 1019 /* ND 21 */ | |
| 1020 /***************************************************************************/ | |
| 1021 WBLOCK nd_21_step1 = { | |
| 1022 0, | |
| 1023 6, | |
| 1024 {0xFE, 0xC0, 0x47, 0xC9, 0xE0, 0xC0} | |
| 1025 }; | |
| 1026 WBLOCK nd_21_step3 = { | |
| 1027 0, | |
| 1028 4, | |
| 1029 {0xFE, 0xC0, 0xF4, 0xC4} | |
| 1030 }; | |
| 1031 | |
| 1032 /***************************************************************************/ | |
| 1033 /* ND 23 */ | |
| 1034 /***************************************************************************/ | |
| 1035 WBLOCK nd_23_step1 = { | |
| 1036 0, | |
| 1037 6, | |
| 1038 {0xFE, 0xC0, 0x47, 0xF1, 0xE0, 0xC0} | |
| 1039 }; | |
| 1040 WBLOCK nd_23_step3 = { | |
| 1041 0, | |
| 1042 4, | |
| 1043 {0xFE, 0xC0, 0xF4, 0xC4} | |
| 1044 }; | |
| 1045 | |
| 1046 /***************************************************************************/ | |
| 1047 /* BS-周波数テーブル */ | |
| 1048 /***************************************************************************/ | |
| 1049 WBLOCK_BS_PLL bs_pll[MAX_BS_CHANNEL] = { | |
| 36 | 1050 {{&bs_1_step1, &bs_com_step2, &bs_1_step3}}, |
| 1051 {{&bs_3_step1, &bs_com_step2, &bs_3_step3}}, | |
| 1052 {{&bs_5_step1, &bs_com_step2, &bs_5_step3}}, | |
| 1053 {{&bs_7_step1, &bs_com_step2, &bs_7_step3}}, | |
| 1054 {{&bs_9_step1, &bs_com_step2, &bs_9_step3}}, | |
| 1055 {{&bs_11_step1, &bs_com_step2, &bs_11_step3}}, | |
| 1056 {{&bs_13_step1, &bs_com_step2, &bs_13_step3}}, | |
| 1057 {{&bs_15_step1, &bs_com_step2, &bs_15_step3}}, | |
| 1058 {{&bs_17_step1, &bs_com_step2, &bs_17_step3}}, | |
| 1059 {{&bs_19_step1, &bs_com_step2, &bs_19_step3}}, | |
| 1060 {{&bs_21_step1, &bs_com_step2, &bs_21_step3}}, | |
| 1061 {{&bs_23_step1, &bs_com_step2, &bs_21_step3}}, | |
| 1062 {{&nd_2_step1, &bs_com_step2, &nd_2_step3}}, | |
| 1063 {{&nd_4_step1, &bs_com_step2, &nd_4_step3}}, | |
| 1064 {{&nd_6_step1, &bs_com_step2, &nd_6_step3}}, | |
| 1065 {{&nd_8_step1, &bs_com_step2, &nd_8_step3}}, | |
| 1066 {{&nd_10_step1, &bs_com_step2, &nd_10_step3}}, | |
| 1067 {{&nd_12_step1, &bs_com_step2, &nd_12_step3}}, | |
| 1068 {{&nd_14_step1, &bs_com_step2, &nd_14_step3}}, | |
| 1069 {{&nd_16_step1, &bs_com_step2, &nd_16_step3}}, | |
| 1070 {{&nd_18_step1, &bs_com_step2, &nd_18_step3}}, | |
| 1071 {{&nd_20_step1, &bs_com_step2, &nd_20_step3}}, | |
| 1072 {{&nd_22_step1, &bs_com_step2, &nd_22_step3}}, | |
| 1073 {{&nd_24_step1, &bs_com_step2, &nd_24_step3}}, | |
| 1074 {{&nd_1_step1, &bs_com_step2, &nd_1_step3}}, | |
| 1075 {{&nd_3_step1, &bs_com_step2, &nd_3_step3}}, | |
| 1076 {{&nd_5_step1, &bs_com_step2, &nd_5_step3}}, | |
| 1077 {{&nd_7_step1, &bs_com_step2, &nd_7_step3}}, | |
| 1078 {{&nd_9_step1, &bs_com_step2, &nd_9_step3}}, | |
| 1079 {{&nd_11_step1, &bs_com_step2, &nd_11_step3}}, | |
| 1080 {{&nd_13_step1, &bs_com_step2, &nd_13_step3}}, | |
| 1081 {{&nd_15_step1, &bs_com_step2, &nd_15_step3}}, | |
| 1082 {{&nd_17_step1, &bs_com_step2, &nd_17_step3}}, | |
| 1083 {{&nd_19_step1, &bs_com_step2, &nd_19_step3}}, | |
| 1084 {{&nd_21_step1, &bs_com_step2, &nd_21_step3}}, | |
| 1085 {{&nd_23_step1, &bs_com_step2, &nd_23_step3}} | |
| 0 | 1086 }; |
| 1087 WBLOCK *bs_get_ts_id[(MAX_BS_TS_ID / 2)] = { | |
| 1088 &bs_get_slot_ts_id_1, | |
| 1089 &bs_get_slot_ts_id_2, | |
| 1090 &bs_get_slot_ts_id_3, | |
| 1091 &bs_get_slot_ts_id_4 | |
| 1092 }; |
