comparison postprocess_altivec_template.c @ 28:b55400a067f0 libpostproc

Remove unused variables.
author diego
date Tue, 10 Oct 2006 11:59:10 +0000
parents da3bfee1fa67
children 8dc2a966afa7
comparison
equal deleted inserted replaced
27:c83a71c1729d 28:b55400a067f0
65 this code makes no assumption on src or stride. 65 this code makes no assumption on src or stride.
66 One could remove the recomputation of the perm 66 One could remove the recomputation of the perm
67 vector by assuming (stride % 16) == 0, unfortunately 67 vector by assuming (stride % 16) == 0, unfortunately
68 this is not always true. 68 this is not always true.
69 */ 69 */
70 register int y;
71 short __attribute__ ((aligned(16))) data[8]; 70 short __attribute__ ((aligned(16))) data[8];
72 int numEq; 71 int numEq;
73 uint8_t *src2 = src; 72 uint8_t *src2 = src;
74 vector signed short v_dcOffset; 73 vector signed short v_dcOffset;
75 vector signed short v2QP; 74 vector signed short v2QP;
263 LOAD_LINE(9); 262 LOAD_LINE(9);
264 } 263 }
265 #undef LOAD_LINE 264 #undef LOAD_LINE
266 #undef LOAD_LINE_ALIGNED 265 #undef LOAD_LINE_ALIGNED
267 266
268 const vector unsigned short v_1 = vec_splat_u16(1);
269 const vector unsigned short v_2 = vec_splat_u16(2); 267 const vector unsigned short v_2 = vec_splat_u16(2);
270 const vector unsigned short v_4 = vec_splat_u16(4); 268 const vector unsigned short v_4 = vec_splat_u16(4);
271 269
272 const vector signed short v_diff01 = vec_sub(vb0, vb1); 270 const vector signed short v_diff01 = vec_sub(vb0, vb1);
273 const vector unsigned short v_cmp01 = 271 const vector unsigned short v_cmp01 =
516 can be removed by assuming proper alignement of 514 can be removed by assuming proper alignement of
517 src & stride :-( 515 src & stride :-(
518 */ 516 */
519 uint8_t *srcCopy = src; 517 uint8_t *srcCopy = src;
520 uint8_t __attribute__((aligned(16))) dt[16]; 518 uint8_t __attribute__((aligned(16))) dt[16];
521 const vector unsigned char vuint8_1 = vec_splat_u8(1);
522 const vector signed int zero = vec_splat_s32(0); 519 const vector signed int zero = vec_splat_s32(0);
523 vector unsigned char v_dt; 520 vector unsigned char v_dt;
524 dt[0] = deringThreshold; 521 dt[0] = deringThreshold;
525 v_dt = vec_splat(vec_ld(0, dt), 0); 522 v_dt = vec_splat(vec_ld(0, dt), 0);
526 523
680 677
681 int __attribute__((aligned(16))) tQP2[4]; 678 int __attribute__((aligned(16))) tQP2[4];
682 tQP2[0]= c->QP/2 + 1; 679 tQP2[0]= c->QP/2 + 1;
683 vector signed int vQP2 = vec_ld(0, tQP2); 680 vector signed int vQP2 = vec_ld(0, tQP2);
684 vQP2 = vec_splat(vQP2, 0); 681 vQP2 = vec_splat(vQP2, 0);
685 const vector unsigned char vuint8_2 = vec_splat_u8(2);
686 const vector signed int vsint32_8 = vec_splat_s32(8); 682 const vector signed int vsint32_8 = vec_splat_s32(8);
687 const vector unsigned int vuint32_4 = vec_splat_u32(4); 683 const vector unsigned int vuint32_4 = vec_splat_u32(4);
688 684
689 const vector unsigned char permA1 = (vector unsigned char) 685 const vector unsigned char permA1 = (vector unsigned char)
690 AVV(0x00, 0x01, 0x02, 0x10, 0x11, 0x12, 0x1F, 0x1F, 686 AVV(0x00, 0x01, 0x02, 0x10, 0x11, 0x12, 0x1F, 0x1F,
1105 vec_st(temp15, 240, dst); 1101 vec_st(temp15, 240, dst);
1106 } 1102 }
1107 1103
1108 static inline void transpose_8x16_char_fromPackedAlign_altivec(unsigned char* dst, unsigned char* src, int stride) { 1104 static inline void transpose_8x16_char_fromPackedAlign_altivec(unsigned char* dst, unsigned char* src, int stride) {
1109 const vector unsigned char zero = vec_splat_u8(0); 1105 const vector unsigned char zero = vec_splat_u8(0);
1110 const vector unsigned char magic_perm = (const vector unsigned char)
1111 AVV(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
1112 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F);
1113 1106
1114 #define LOAD_DOUBLE_LINE(i, j) \ 1107 #define LOAD_DOUBLE_LINE(i, j) \
1115 vector unsigned char src##i = vec_ld(i * 16, src); \ 1108 vector unsigned char src##i = vec_ld(i * 16, src); \
1116 vector unsigned char src##j = vec_ld(j * 16, src) 1109 vector unsigned char src##j = vec_ld(j * 16, src)
1117 1110