comparison ppc/dsputil_ppc.c @ 11969:3cd4cd0509cd libavcodec

Remove PPC perf counter support This functionality is better accessed through tools like oprofile.

11968:58c2da0a371b

 * License along with FFmpeg; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
 */

#include "libavcodec/dsputil.h"

#include "dsputil_ppc.h"

#include "dsputil_altivec.h"

int mm_flags = 0;

int mm_support(void)

        result |= FF_MM_ALTIVEC;
    }
#endif /* result */
    return result;
}

#if CONFIG_POWERPC_PERF
unsigned long long perfdata[POWERPC_NUM_PMC_ENABLED][powerpc_perf_total][powerpc_data_total];
/* list below must match enum in dsputil_ppc.h */
static unsigned char* perfname[] = {
    "ff_fft_calc_altivec",
    "gmc1_altivec",
    "dct_unquantize_h263_altivec",
    "fdct_altivec",
    "idct_add_altivec",
    "idct_put_altivec",
    "put_pixels16_altivec",
    "avg_pixels16_altivec",
    "avg_pixels8_altivec",
    "put_pixels8_xy2_altivec",
    "put_no_rnd_pixels8_xy2_altivec",
    "put_pixels16_xy2_altivec",
    "put_no_rnd_pixels16_xy2_altivec",
    "hadamard8_diff8x8_altivec",
    "hadamard8_diff16_altivec",
    "avg_pixels8_xy2_altivec",
    "clear_blocks_dcbz32_ppc",
    "clear_blocks_dcbz128_ppc",
    "put_h264_chroma_mc8_altivec",
    "avg_h264_chroma_mc8_altivec",
    "put_h264_qpel16_h_lowpass_altivec",
    "avg_h264_qpel16_h_lowpass_altivec",
    "put_h264_qpel16_v_lowpass_altivec",
    "avg_h264_qpel16_v_lowpass_altivec",
    "put_h264_qpel16_hv_lowpass_altivec",
    "avg_h264_qpel16_hv_lowpass_altivec",
    ""
};
#include <stdio.h>
#endif

#if CONFIG_POWERPC_PERF
void powerpc_display_perf_report(void)
{
    int i, j;
    av_log(NULL, AV_LOG_INFO, "PowerPC performance report\n Values are from the PMC registers, and represent whatever the registers are set to record.\n");
    for(i = 0 ; i < powerpc_perf_total ; i++) {
        for (j = 0; j < POWERPC_NUM_PMC_ENABLED ; j++) {
            if (perfdata[j][i][powerpc_data_num] != (unsigned long long)0)
                av_log(NULL, AV_LOG_INFO,
                       " Function \"%s\" (pmc%d):\n\tmin: %"PRIu64"\n\tmax: %"PRIu64"\n\tavg: %1.2lf (%"PRIu64")\n",
                       perfname[i],
                       j+1,
                       perfdata[j][i][powerpc_data_min],
                       perfdata[j][i][powerpc_data_max],
                       (double)perfdata[j][i][powerpc_data_sum] /
                       (double)perfdata[j][i][powerpc_data_num],
                       perfdata[j][i][powerpc_data_num]);
        }
    }
}
#endif /* CONFIG_POWERPC_PERF */

/* ***** WARNING ***** WARNING ***** WARNING ***** */
/*
clear_blocks_dcbz32_ppc will not work properly on PowerPC processors with a
cache line size not equal to 32 bytes.

see <http://developer.apple.com/technotes/tn/tn2087.html>
and <http://developer.apple.com/technotes/tn/tn2086.html>
*/
static void clear_blocks_dcbz32_ppc(DCTELEM *blocks)
{
POWERPC_PERF_DECLARE(powerpc_clear_blocks_dcbz32, 1);
    register int misal = ((unsigned long)blocks & 0x00000010);
    register int i = 0;
POWERPC_PERF_START_COUNT(powerpc_clear_blocks_dcbz32, 1);
#if 1
    if (misal) {
        ((unsigned long*)blocks)[0] = 0L;
        ((unsigned long*)blocks)[1] = 0L;
        ((unsigned long*)blocks)[2] = 0L;

        i += 16;
    }
#else
    memset(blocks, 0, sizeof(DCTELEM)*6*64);
#endif
POWERPC_PERF_STOP_COUNT(powerpc_clear_blocks_dcbz32, 1);
}

/* same as above, when dcbzl clear a whole 128B cache line
   i.e. the PPC970 aka G5 */
#if HAVE_DCBZL
static void clear_blocks_dcbz128_ppc(DCTELEM *blocks)
{
POWERPC_PERF_DECLARE(powerpc_clear_blocks_dcbz128, 1);
    register int misal = ((unsigned long)blocks & 0x0000007f);
    register int i = 0;
POWERPC_PERF_START_COUNT(powerpc_clear_blocks_dcbz128, 1);
#if 1
    if (misal) {
        // we could probably also optimize this case,
        // but there's not much point as the machines
        // aren't available yet (2003-06-26)

            __asm__ volatile("dcbzl %0,%1" : : "b" (blocks), "r" (i) : "memory");
        }
#else
    memset(blocks, 0, sizeof(DCTELEM)*6*64);
#endif
POWERPC_PERF_STOP_COUNT(powerpc_clear_blocks_dcbz128, 1);
}
#else
static void clear_blocks_dcbz128_ppc(DCTELEM *blocks)
{
    memset(blocks, 0, sizeof(DCTELEM)*6*64);

                c->idct     = ff_vp3_idct_altivec;
                c->idct_permutation_type = FF_TRANSPOSE_IDCT_PERM;
            }
        }

#if CONFIG_POWERPC_PERF
        {
            int i, j;
            for (i = 0 ; i < powerpc_perf_total ; i++) {
                for (j = 0; j < POWERPC_NUM_PMC_ENABLED ; j++) {
                    perfdata[j][i][powerpc_data_min] = 0xFFFFFFFFFFFFFFFFULL;
                    perfdata[j][i][powerpc_data_max] = 0x0000000000000000ULL;
                    perfdata[j][i][powerpc_data_sum] = 0x0000000000000000ULL;
                    perfdata[j][i][powerpc_data_num] = 0x0000000000000000ULL;
                }
            }
        }
#endif /* CONFIG_POWERPC_PERF */
    }
#endif /* HAVE_ALTIVEC */
}

11969:3cd4cd0509cd

 * License along with FFmpeg; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
 */

#include "libavcodec/dsputil.h"
#include "dsputil_altivec.h"

int mm_flags = 0;

int mm_support(void)

        result |= FF_MM_ALTIVEC;
    }
#endif /* result */
    return result;
}

/* ***** WARNING ***** WARNING ***** WARNING ***** */
/*
clear_blocks_dcbz32_ppc will not work properly on PowerPC processors with a
cache line size not equal to 32 bytes.

see <http://developer.apple.com/technotes/tn/tn2087.html>
and <http://developer.apple.com/technotes/tn/tn2086.html>
*/
static void clear_blocks_dcbz32_ppc(DCTELEM *blocks)
{
    register int misal = ((unsigned long)blocks & 0x00000010);
    register int i = 0;
#if 1
    if (misal) {
        ((unsigned long*)blocks)[0] = 0L;
        ((unsigned long*)blocks)[1] = 0L;
        ((unsigned long*)blocks)[2] = 0L;

        i += 16;
    }
#else
    memset(blocks, 0, sizeof(DCTELEM)*6*64);
#endif
}

/* same as above, when dcbzl clear a whole 128B cache line
   i.e. the PPC970 aka G5 */
#if HAVE_DCBZL
static void clear_blocks_dcbz128_ppc(DCTELEM *blocks)
{
    register int misal = ((unsigned long)blocks & 0x0000007f);
    register int i = 0;
#if 1
    if (misal) {
        // we could probably also optimize this case,
        // but there's not much point as the machines
        // aren't available yet (2003-06-26)

            __asm__ volatile("dcbzl %0,%1" : : "b" (blocks), "r" (i) : "memory");
        }
#else
    memset(blocks, 0, sizeof(DCTELEM)*6*64);
#endif
}
#else
static void clear_blocks_dcbz128_ppc(DCTELEM *blocks)
{
    memset(blocks, 0, sizeof(DCTELEM)*6*64);

                c->idct     = ff_vp3_idct_altivec;
                c->idct_permutation_type = FF_TRANSPOSE_IDCT_PERM;
            }
        }

    }
#endif /* HAVE_ALTIVEC */
}